summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/dsc
diff options
context:
space:
mode:
authorHarry Wentland <harry.wentland@amd.com>2023-02-13 23:29:06 +0300
committerAlex Deucher <alexander.deucher@amd.com>2023-03-07 22:22:40 +0300
commit84c03df58d8bbf77feb2f199f10dbe8f7f72c782 (patch)
treed3bc40243112e6a28068cd7518f6805164b44949 /drivers/gpu/drm/amd/display/dc/dsc
parentefa4c4df864ecd969670093524d3e8f69188e5eb (diff)
downloadlinux-84c03df58d8bbf77feb2f199f10dbe8f7f72c782.tar.xz
drm/amd/display: Build DSC without DCN config
[Why & How] DSC needs DCN but we are trying reduce the usage of the DCN flag. It's easier to build the DSC code sprinkled around DC core and the DMs and just guard the place where DSC uses floating point code. Since DSC is never enabled on non-DCN ASICs this won't have any effect. Reviewed-by: Hamza Mahfooz <Hamza.Mahfooz@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dsc')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c b/drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c
index e97cf09be9d5..3215ca4d5799 100644
--- a/drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c
+++ b/drivers/gpu/drm/amd/display/dc/dsc/rc_calc.c
@@ -39,6 +39,7 @@
*/
void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps)
{
+#if defined(CONFIG_DRM_AMD_DC_DCN)
enum colour_mode mode;
enum bits_per_comp bpc;
bool is_navite_422_or_420;
@@ -59,4 +60,5 @@ void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps)
slice_width, slice_height,
pps->dsc_version_minor);
DC_FP_END();
+#endif
}