diff options
| author | Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2023-10-05 18:48:44 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-10-27 01:57:58 +0300 |
| commit | da2d16fcdda344b18ec9a4a55dff9805d5d781d2 (patch) | |
| tree | 11ed56064172a1f5ddfe954b56111967cec09c1b /drivers/gpu/drm/amd/display/dc/hwss/dcn35 | |
| parent | 488bb99d42e607a40524ee1514b0b1246b1f69c8 (diff) | |
| download | linux-da2d16fcdda344b18ec9a4a55dff9805d5d781d2.tar.xz | |
drm/amd/display: Fix IPS handshake for idle optimizations
[Why]
Intermittent reboot hangs are observed introduced by
"Improve x86 and dmub ips handshake".
[How]
Bring back the commit but fix the polling.
Avoid hanging in place forever by bounding the delay and ensure that
we still message DMCUB on IPS2 exit to notify driver idle has been
cleared.
Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/hwss/dcn35')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 30 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h | 3 |
2 files changed, 22 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c index ece806a63d8d..34737d60b965 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c @@ -648,18 +648,10 @@ bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable) // TODO: review other cases when idle optimization is allowed - if (!enable) { - // Tell PMFW to exit low power state - if (dc->clk_mgr->funcs->exit_low_power_state) - dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr); - - dc_dmub_srv_is_hw_pwr_up(dc->ctx->dmub_srv, true); - } - - dc_dmub_srv_notify_idle(dc, enable); - if (!enable) - dc_dmub_srv_is_hw_pwr_up(dc->ctx->dmub_srv, true); + dc_dmub_srv_exit_low_power_state(dc); + else + dc_dmub_srv_notify_idle(dc, enable); return true; } @@ -1193,3 +1185,19 @@ void dcn35_optimize_bandwidth( dc->hwss.root_clock_control(dc, &pg_update_state, false); } } + +void dcn35_set_idle_state(const struct dc *dc, bool allow_idle) +{ + // TODO: Find a more suitable communcation + if (dc->clk_mgr->funcs->set_idle_state) + dc->clk_mgr->funcs->set_idle_state(dc->clk_mgr, allow_idle); +} + +uint32_t dcn35_get_idle_state(const struct dc *dc) +{ + // TODO: Find a more suitable communcation + if (dc->clk_mgr->funcs->get_idle_state) + return dc->clk_mgr->funcs->get_idle_state(dc->clk_mgr); + + return 0; +} diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h index 9b66ab0c909c..0dff10d179b8 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h @@ -81,4 +81,7 @@ void dcn35_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on); + +void dcn35_set_idle_state(const struct dc *dc, bool allow_idle); +uint32_t dcn35_get_idle_state(const struct dc *dc); #endif /* __DC_HWSS_DCN35_H__ */ |