diff options
| author | Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2023-10-03 19:18:44 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-10-27 01:55:58 +0300 |
| commit | d5f9a92bd1e234b8a7cf6f350b5bc0169221ae59 (patch) | |
| tree | e6895e9213e20ae51e1ae5b5131086e373660f7a /drivers/gpu/drm/amd/display/dc/hwss | |
| parent | 543068f0e3721e1cbd6cee48c17f277950f59670 (diff) | |
| download | linux-d5f9a92bd1e234b8a7cf6f350b5bc0169221ae59.tar.xz | |
drm/amd/display: Revert "Improve x86 and dmub ips handshake"
This reverts commit 1288d702080949f87688d49dfeeacc99f40adc9b.
Causes intermittent hangs during reboot stress testing.
Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/hwss')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 30 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h | 3 |
3 files changed, 12 insertions, 24 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c index d3429134b2e3..8f717db01f85 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c @@ -652,10 +652,18 @@ bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable) // TODO: review other cases when idle optimization is allowed + if (!enable) { + // Tell PMFW to exit low power state + if (dc->clk_mgr->funcs->exit_low_power_state) + dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr); + + dc_dmub_srv_is_hw_pwr_up(dc->ctx->dmub_srv, true); + } + + dc_dmub_srv_notify_idle(dc, enable); + if (!enable) - dc_dmub_srv_exit_low_power_state(dc); - else - dc_dmub_srv_notify_idle(dc, enable); + dc_dmub_srv_is_hw_pwr_up(dc->ctx->dmub_srv, true); return true; } @@ -1189,19 +1197,3 @@ void dcn35_optimize_bandwidth( dc->hwss.root_clock_control(dc, &pg_update_state, false); } } - -void dcn35_set_idle_state(const struct dc *dc, bool allow_idle) -{ - // TODO: Find a more suitable communcation - if (dc->clk_mgr->funcs->set_idle_state) - dc->clk_mgr->funcs->set_idle_state(dc->clk_mgr, allow_idle); -} - -uint32_t dcn35_get_idle_state(const struct dc *dc) -{ - // TODO: Find a more suitable communcation - if (dc->clk_mgr->funcs->get_idle_state) - return dc->clk_mgr->funcs->get_idle_state(dc->clk_mgr); - - return 0; -} diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h index 0dff10d179b8..9b66ab0c909c 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h @@ -81,7 +81,4 @@ void dcn35_dsc_pg_control( struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on); - -void dcn35_set_idle_state(const struct dc *dc, bool allow_idle); -uint32_t dcn35_get_idle_state(const struct dc *dc); #endif /* __DC_HWSS_DCN35_H__ */ diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h index 452680fe9aab..d45302035e3f 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h @@ -418,8 +418,7 @@ struct hw_sequencer_funcs { struct pg_block_update *update_state, bool power_on); void (*root_clock_control)(struct dc *dc, struct pg_block_update *update_state, bool power_on); - void (*set_idle_state)(const struct dc *dc, bool allow_idle); - uint32_t (*get_idle_state)(const struct dc *dc); + bool (*is_pipe_topology_transition_seamless)(struct dc *dc, const struct dc_state *cur_ctx, const struct dc_state *new_ctx); |