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| author | Michael Strauss <michael.strauss@amd.com> | 2021-09-09 23:33:52 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-09-30 00:29:59 +0300 |
| commit | 028a998c62f72cb879d44809cb96acdcc47d6137 (patch) | |
| tree | dbb0c6e9890e2f7859516e0f1d3569c801777b2e /drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | |
| parent | 87e9585b3628555148a1671296a088871d6d35b6 (diff) | |
| download | linux-028a998c62f72cb879d44809cb96acdcc47d6137.tar.xz | |
drm/amd/display: Defer LUT memory powerdown until LUT bypass latches
[WHY]
Blnd, 3dlut, and shaper LUT select registers are double buffered, however
their accompanying LUT memory shutdown registers are not. As a result,
shutting down LUT memory immediately after setting a block to bypass causes
corruption as bypass only happens at next Vupdate.
[HOW]
Re-enable mem low power for CM block
Force optimization on next flip and disable LUT memory during optimization
sequence if LUT select field is then set to bypass
v2: squash in CONFIG_DRM_AMD_DC_DCN fix (Alex)
Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h index 00fc81431b43..9f12792b7e59 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h @@ -29,6 +29,15 @@ #include "transform.h" +union defer_reg_writes { + struct { + bool disable_blnd_lut:1; + bool disable_3dlut:1; + bool disable_shaper:1; + } bits; + uint32_t raw; +}; + struct dpp { const struct dpp_funcs *funcs; struct dc_context *ctx; @@ -43,6 +52,7 @@ struct dpp { struct pwl_params regamma_params; struct pwl_params degamma_params; struct dpp_cursor_attributes cur_attr; + union defer_reg_writes deferred_reg_writes; struct pwl_params shaper_params; bool cm_bypass_mode; @@ -245,6 +255,8 @@ struct dpp_funcs { bool dppclk_div, bool enable); + void (*dpp_deferred_update)( + struct dpp *dpp); bool (*dpp_program_blnd_lut)( struct dpp *dpp, const struct pwl_params *params); |