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| author | Eric Bernstein <eric.bernstein@amd.com> | 2017-12-12 22:14:10 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-12-20 22:48:47 +0300 |
| commit | 72d520d4fa76e59d1882620fa34680ff4258ae6f (patch) | |
| tree | b68c3e7767e9856746bb286e1840b7e686e98758 /drivers/gpu/drm/amd/display/dc/inc/hw/opp.h | |
| parent | 4ebf8483112e3f33f7a96b5aa8779d25ad5f71b7 (diff) | |
| download | linux-72d520d4fa76e59d1882620fa34680ff4258ae6f.tar.xz | |
drm/amd/display: Update FMT and OPPBUF functions
Updates to FMT and OPPBUF programming from HW team
pseudocode review.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/opp.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/opp.h | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h index 17e143e4cb94..ab8fb77f1ae5 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h @@ -249,6 +249,21 @@ enum ovl_csc_adjust_item { OVERLAY_COLOR_TEMPERATURE }; +enum oppbuf_display_segmentation { + OPPBUF_DISPLAY_SEGMENTATION_1_SEGMENT = 0, + OPPBUF_DISPLAY_SEGMENTATION_2_SEGMENT = 1, + OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT = 2, + OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT_SPLIT_LEFT = 3, + OPPBUF_DISPLAY_SEGMENTATION_4_SEGMENT_SPLIT_RIGHT = 4 +}; + +struct oppbuf_params { + uint32_t active_width; + enum oppbuf_display_segmentation mso_segmentation; + uint32_t mso_overlap_pixel_num; + uint32_t pixel_repetition; +}; + struct opp_funcs { @@ -277,10 +292,10 @@ struct opp_funcs { void (*opp_destroy)(struct output_pixel_processor **opp); - void (*opp_set_stereo_polarity)( - struct output_pixel_processor *opp, - bool enable, - bool rightEyePolarity); + void (*opp_program_stereo)( + struct output_pixel_processor *opp, + bool enable, + const struct dc_crtc_timing *timing); }; |