summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
diff options
context:
space:
mode:
authorTaimur Hassan <syed.hassan@amd.com>2020-10-04 22:20:45 +0300
committerAlex Deucher <alexander.deucher@amd.com>2020-10-26 20:29:21 +0300
commita47cc3ab051f963ebca820dc48e887e9a7101244 (patch)
tree91532e3d3d0e7b34fc0fa38ef05e6d6dafa1cd6d /drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
parent1db522cd03fdf692047e2317cfa16cf89bd42992 (diff)
downloadlinux-a47cc3ab051f963ebca820dc48e887e9a7101244.tar.xz
drm/amd/display: Raise DPG height during timing synchronization
[Why] Underflow counter increases in AGM when performing some mode switches due to timing sync, which is a known hardware issue. [How] Temporarily raise DPG height during timing sync so that underflow is not reported. Signed-off-by: Taimur Hassan <syed.hassan@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/opp.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/opp.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
index 2717352eb697..7617fabbd16e 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
@@ -313,6 +313,11 @@ struct opp_funcs {
int height,
int offset);
+ void (*opp_program_dpg_dimensions)(
+ struct output_pixel_processor *opp,
+ int width,
+ int height);
+
bool (*dpg_is_blanked)(
struct output_pixel_processor *opp);