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authorSivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>2017-10-19 20:41:30 +0300
committerAlex Deucher <alexander.deucher@amd.com>2017-12-05 00:41:37 +0300
commitde4a2967737114d426411a79781d9d81d0ff38d2 (patch)
treef12ad8bdbdc7f6d54c97610bd99c4d2e1066e288 /drivers/gpu/drm/amd/display/dc/inc
parentc9ef081df08d0ad5bae7f6fb9d7d63422b109b62 (diff)
downloadlinux-de4a2967737114d426411a79781d9d81d0ff38d2.tar.xz
drm/amd/display: Apply VQ adjustments in MPO case
Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h10
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h14
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h6
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/transform.h6
4 files changed, 30 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
index 83a68460edcd..6eca95931ee1 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
@@ -98,6 +98,10 @@ struct dpp_funcs {
struct dpp *dpp_base,
enum opp_regamma mode);
+ void (*ipp_program_bias_and_scale)(
+ struct dpp *dpp,
+ struct dc_bias_and_scale *params);
+
void (*ipp_set_degamma)(
struct dpp *dpp_base,
enum ipp_degamma_mode mode);
@@ -111,8 +115,10 @@ struct dpp_funcs {
void (*ipp_setup)(
struct dpp *dpp_base,
- enum surface_pixel_format input_format,
- enum expansion_mode mode);
+ enum surface_pixel_format format,
+ enum expansion_mode mode,
+ struct csc_transform input_csc_color_matrix,
+ enum dc_color_space input_color_space);
void (*ipp_full_bypass)(struct dpp *dpp_base);
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
index 9602f261b614..fa3d100de264 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
@@ -138,4 +138,18 @@ enum opp_regamma {
OPP_REGAMMA_USER
};
+struct csc_transform {
+ uint16_t matrix[12];
+ bool enable_adjustment;
+};
+
+struct dc_bias_and_scale {
+ uint16_t scale_red;
+ uint16_t bias_red;
+ uint16_t scale_green;
+ uint16_t bias_green;
+ uint16_t scale_blue;
+ uint16_t bias_blue;
+};
+
#endif /* __DAL_HW_SHARED_H__ */
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h
index f11aa484f46e..2109eac20a3d 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h
@@ -85,8 +85,10 @@ struct ipp_funcs {
/* setup ipp to expand/convert input to pixel processor internal format */
void (*ipp_setup)(
struct input_pixel_processor *ipp,
- enum surface_pixel_format input_format,
- enum expansion_mode mode);
+ enum surface_pixel_format format,
+ enum expansion_mode mode,
+ struct csc_transform input_csc_color_matrix,
+ enum dc_color_space input_color_space);
/* DCE function to setup IPP. TODO: see if we can consolidate to setup */
void (*ipp_program_prescale)(
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h b/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h
index ea88997e1bbd..6f6c02b89f90 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/transform.h
@@ -250,8 +250,10 @@ struct transform_funcs {
void (*ipp_setup)(
struct transform *xfm_base,
- enum surface_pixel_format input_format,
- enum expansion_mode mode);
+ enum surface_pixel_format format,
+ enum expansion_mode mode,
+ struct csc_transform input_csc_color_matrix,
+ enum dc_color_space input_color_space);
void (*ipp_full_bypass)(struct transform *xfm_base);