diff options
| author | Yihan Zhu <yihan.zhu@amd.com> | 2023-12-01 16:25:17 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-12-06 23:22:34 +0300 |
| commit | cfa96a14e89d8341a7308acc4c6168991d4fdac0 (patch) | |
| tree | 4f039cb308a1caaeb9805d302c726c8e746ef8c7 /drivers/gpu/drm/amd/display/dc/resource | |
| parent | 21afc872fbc29cd68cfde816d1df4d55848c3f61 (diff) | |
| download | linux-cfa96a14e89d8341a7308acc4c6168991d4fdac0.tar.xz | |
drm/amd/display: add MPC MCM 1D LUT clock gating programming
Missing clock gating programming blocks memory power on from boot up.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Chris Park <chris.park@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Yihan Zhu <yihan.zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/resource')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c index 1a0ed1c7e2d4..13324422ff50 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c @@ -736,7 +736,7 @@ static const struct dc_debug_options debug_defaults_drv = { .i2c = true, .dmcu = false, // This is previously known to cause hang on S3 cycles if enabled .dscl = true, - .cm = false, + .cm = true, .mpc = true, .optc = true, .vpg = true, |