diff options
| author | Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> | 2023-05-12 21:03:15 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-08-08 00:12:49 +0300 |
| commit | e013864479f7572153b27072b6693d45301e3cf6 (patch) | |
| tree | efd18e990aca47c766fe399d8c5096a0f3a6abbd /drivers/gpu/drm/amd/display/include | |
| parent | e2e42edfe8533af7b30f505d41d44e0d180065da (diff) | |
| download | linux-e013864479f7572153b27072b6693d45301e3cf6.tar.xz | |
drm/amd/display: Add structs for Freesync Panel Replay
In some instances, the GPU is transmitting repeated frame to the sink
without any updates or changes in the content. These repeat transmission
are wasteful, resulting in power draw in different aspects of the system
1. DCN is fetching the frame of data from DF/UMC/DRAM. This memory traffic
prevents power down of parts of this HW path.
2. GPU is transmitting pixel data to the display through the main link of
the DisplayPort interface. This prevents power down of both the Source
transmitter (TX) and the Sink receiver (RX)
The concepts of utilizing replay is similar to PSR, but there is a benefit of:
Source and Sink remaining synchronized which allows for
- lower latency when switching from replay to live frames
- enable the possibility of more use cases
- easy control of the sink's refresh rate during replay
Due to Source and Sink remaining timing synchronized, Replay can be activated
in more UI scenarios.
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/include')
| -rw-r--r-- | drivers/gpu/drm/amd/display/include/dpcd_defs.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/include/dpcd_defs.h b/drivers/gpu/drm/amd/display/include/dpcd_defs.h index c062a44db078..f72023a296a0 100644 --- a/drivers/gpu/drm/amd/display/include/dpcd_defs.h +++ b/drivers/gpu/drm/amd/display/include/dpcd_defs.h @@ -172,6 +172,7 @@ enum dpcd_psr_sink_states { #define DP_SOURCE_BACKLIGHT_CURRENT_PEAK 0x326 #define DP_SOURCE_BACKLIGHT_CONTROL 0x32E #define DP_SOURCE_BACKLIGHT_ENABLE 0x32F -#define DP_SOURCE_MINIMUM_HBLANK_SUPPORTED 0x340 +#define DP_SOURCE_MINIMUM_HBLANK_SUPPORTED 0x340 +#define DP_SINK_PR_REPLAY_STATUS 0x378 #endif /* __DAL_DPCD_DEFS_H__ */ |