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authorDave Airlie <airlied@redhat.com>2012-09-19 05:12:41 +0400
committerDave Airlie <airlied@gmail.com>2012-09-19 13:59:26 +0400
commit87229ad9de079cb12ee09a3dc16113c390b729d5 (patch)
tree3f2a198c4c69346656611fe284c17f8a42080541 /drivers/gpu/drm/drm_cache.c
parentf2032d413a2d47089f2b3f8fdd0e344a04de8195 (diff)
downloadlinux-87229ad9de079cb12ee09a3dc16113c390b729d5.tar.xz
drm: micro optimise cache flushing
We hit this a lot with i915 and although we'd like to engineer things to hit it a lot less, this commit at least makes it consume a few less cycles. from something containing movzwl 0x0(%rip),%r10d to add %r8,%rdx I only noticed it while using perf to profile something else. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/drm_cache.c')
-rw-r--r--drivers/gpu/drm/drm_cache.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index 08758e061478..3dbc7f17eb11 100644
--- a/drivers/gpu/drm/drm_cache.c
+++ b/drivers/gpu/drm/drm_cache.c
@@ -37,12 +37,13 @@ drm_clflush_page(struct page *page)
{
uint8_t *page_virtual;
unsigned int i;
+ const int size = boot_cpu_data.x86_clflush_size;
if (unlikely(page == NULL))
return;
page_virtual = kmap_atomic(page);
- for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
+ for (i = 0; i < PAGE_SIZE; i += size)
clflush(page_virtual + i);
kunmap_atomic(page_virtual);
}