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| author | Dave Airlie <airlied@redhat.com> | 2024-04-26 02:07:22 +0300 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2024-04-26 02:07:28 +0300 |
| commit | bfed5b0257a98b32dd31778fd42ce19f9df26695 (patch) | |
| tree | 288f069e07433c6126e823cf88e48e49444194f3 /drivers/gpu/drm/i915/display/intel_bw.h | |
| parent | 83221064c28a0f9fdc4f63ab4fce2e51bfe23315 (diff) | |
| parent | 6068bc209ac8d07a5d04e93f168465195e22a4cc (diff) | |
| download | linux-bfed5b0257a98b32dd31778fd42ce19f9df26695.tar.xz | |
Merge tag 'drm-intel-next-2024-04-24' of https://anongit.freedesktop.org/git/drm/drm-intel into drm-next
Core Changes:
- Some DP/DP_MST DRM helpers (Imre)
Driver Changes (i915 Display):
- PLL refactoring (Ville)
- Limit eDP MSO pipe only for display version 20 (Luca)
- More display refactor towards independence from i915 dev_priv (Jani)
- QGV/SAGV related refactor (Stanislav)
- Few MTL/DSC and a UHBR monitor fix (Imre)
- BXT/GLK per-lane vswing and PHY reg cleanup (Ville)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Zik0LKEtN1PwXXGb@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_bw.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h index fa1e924ec961..161813cca473 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.h +++ b/drivers/gpu/drm/i915/display/intel_bw.h @@ -47,6 +47,12 @@ struct intel_bw_state { */ u16 qgv_points_mask; + /* + * Flag to force the QGV comparison in atomic check right after the + * hw state readout + */ + bool force_check_qgv; + int min_cdclk[I915_MAX_PIPES]; unsigned int data_rate[I915_MAX_PIPES]; u8 num_active_planes[I915_MAX_PIPES]; |