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author | Matthew Auld <matthew.auld@intel.com> | 2022-08-19 15:39:04 +0300 |
---|---|---|
committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2022-08-20 19:41:56 +0300 |
commit | 54c204c522fd2a887b52c7672b9238903ba59a8b (patch) | |
tree | 95f6410be8cdafa00c21bae44916b91673361deb /drivers/gpu/drm/i915/gem/i915_gem_context.c | |
parent | 6a079903847cce1dd06345127d2a32f26d2cd9c6 (diff) | |
download | linux-54c204c522fd2a887b52c7672b9238903ba59a8b.tar.xz |
Revert "drm/i915/guc: Add delay to disable scheduling after pin count goes to zero"
This reverts commit 6a079903847cce1dd06345127d2a32f26d2cd9c6.
Everything in CI using GuC is now timing out[1], and killing the machine
with this change (perhaps a deadlock?). CI was recently on fire due to
some changes coming in from -rc1, so likely the pre-merge CI results for
this series were invalid? For now just revert, unless GuC experts
already have a fix in mind.
[1] https://intel-gfx-ci.01.org/tree/drm-tip/index.html?
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220819123904.913750-1-matthew.auld@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gem/i915_gem_context.c')
-rw-r--r-- | drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index df7fd1b019ec..dabdfe09f5e5 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -1454,7 +1454,7 @@ static void engines_idle_release(struct i915_gem_context *ctx, int err; /* serialises with execbuf */ - intel_context_close(ce); + set_bit(CONTEXT_CLOSED_BIT, &ce->flags); if (!intel_context_pin_if_active(ce)) continue; |