summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/gvt/cfg_space.c
diff options
context:
space:
mode:
authorPiotr PiĆ³rkowski <piotr.piorkowski@intel.com>2022-08-05 18:59:58 +0300
committerJani Nikula <jani.nikula@intel.com>2022-08-10 13:11:14 +0300
commit6bba2b30d29cbba78ba0f935210108e74dbe7ab3 (patch)
tree9f7dcd444a8b4ae964b650debfef16f8b01072e3 /drivers/gpu/drm/i915/gvt/cfg_space.c
parent1ed88a816d0037ea6fec1be18dfa9db8ee7196a7 (diff)
downloadlinux-6bba2b30d29cbba78ba0f935210108e74dbe7ab3.tar.xz
drm/i915: Use of BARs names instead of numbers
At the moment, when we refer to some PCI BAR we use the number of this BAR in the code. The meaning of BARs between different platforms may be different. Therefore, in order to organize the code, let's start using defined names instead of numbers. v2: Add lost header in cfg_space.c Signed-off-by: Piotr PiĆ³rkowski <piotr.piorkowski@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220805155959.1983584-2-piotr.piorkowski@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/cfg_space.c')
-rw-r--r--drivers/gpu/drm/i915/gvt/cfg_space.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gvt/cfg_space.c b/drivers/gpu/drm/i915/gvt/cfg_space.c
index dad3a6054335..eef3bba8a41b 100644
--- a/drivers/gpu/drm/i915/gvt/cfg_space.c
+++ b/drivers/gpu/drm/i915/gvt/cfg_space.c
@@ -33,6 +33,7 @@
#include "i915_drv.h"
#include "gvt.h"
+#include "intel_pci_config.h"
enum {
INTEL_GVT_PCI_BAR_GTTMMIO = 0,
@@ -353,9 +354,9 @@ void intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu,
memset(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_OPREGION, 0, 4);
vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_GTTMMIO].size =
- pci_resource_len(pdev, 0);
+ pci_resource_len(pdev, GTTMMADR_BAR);
vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_APERTURE].size =
- pci_resource_len(pdev, 2);
+ pci_resource_len(pdev, GTT_APERTURE_BAR);
memset(vgpu_cfg_space(vgpu) + PCI_ROM_ADDRESS, 0, 4);