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authorChangbin Du <changbin.du@intel.com>2017-05-04 05:52:38 +0300
committerZhenyu Wang <zhenyuw@linux.intel.com>2017-06-08 08:59:15 +0300
commit0e86cc9ccc3bf557348befaddf5cb613cf3c4458 (patch)
treed4ca241359ce82bafdcb9b65938da9961df6b2c9 /drivers/gpu/drm/i915/gvt/gvt.c
parent5d0f5de16ef3d127469aa09dcdf07bec5174937f (diff)
downloadlinux-0e86cc9ccc3bf557348befaddf5cb613cf3c4458.tar.xz
drm/i915/gvt: implement per-vm mmio switching optimization
Commit ab9da627906a ("drm/i915: make context status notifier head be per engine") gives us a chance to inspect every single request. Then we can eliminate unnecessary mmio switching for same vGPU. We only need mmio switching for different VMs (including host). This patch introduced a new general API intel_gvt_switch_mmio() to replace the old intel_gvt_load/restore_render_mmio(). This function can be further optimized for vGPU to vGPU switching. To support individual ring switch, we track the owner who occupy each ring. When another VM or host request a ring we do the mmio context switching. Otherwise no need to switch the ring. This optimization is very useful if only one guest has plenty of workloads and the host is mostly idle. The best case is no mmio switching will happen. v2: o fix missing ring switch issue. (chuanxiao) o support individual ring switch. Signed-off-by: Changbin Du <changbin.du@intel.com> Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/gvt.c')
-rw-r--r--drivers/gpu/drm/i915/gvt/gvt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c
index 7dea5e5d5567..20329171e4ab 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.c
+++ b/drivers/gpu/drm/i915/gvt/gvt.c
@@ -244,7 +244,7 @@ int intel_gvt_init_device(struct drm_i915_private *dev_priv)
gvt_dbg_core("init gvt device\n");
idr_init(&gvt->vgpu_idr);
-
+ spin_lock_init(&gvt->scheduler.mmio_context_lock);
mutex_init(&gvt->lock);
gvt->dev_priv = dev_priv;