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| author | Matt Roper <matthew.d.roper@intel.com> | 2022-03-11 09:28:35 +0300 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-03-11 19:18:27 +0300 |
| commit | 239bbb2fe927ed762bfe6307ba6a2e2d94e739da (patch) | |
| tree | eda1786119342288854ad72d38ee58e30b04bbcb /drivers/gpu/drm/i915/i915_reg_defs.h | |
| parent | 661412e301e2ca86799aa4f400d1cf0bd38c57c6 (diff) | |
| download | linux-239bbb2fe927ed762bfe6307ba6a2e2d94e739da.tar.xz | |
drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register defs header
We shouldn't really be keeping track of how many SFC_DONE registers
our platforms can have, but rather how many SFC hardware units there can
be (each SFC unit will have one corresponding SFC_DONE register). So
drop the stray GEN12_SFC_DONE_MAX definition we had in the register
definition file and replace it with an I915_MAX_SFC that follows the
pattern we use for other hardware units. Note that our hardware has a
2:1:1 ratio of VD:VE:SFC, and as far as we know that pattern should
carry forward to future platforms, so we'll define it as #VCS/2.
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220311062835.163744-1-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg_defs.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg_defs.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h index d78d78fce431..8f486f77609f 100644 --- a/drivers/gpu/drm/i915/i915_reg_defs.h +++ b/drivers/gpu/drm/i915/i915_reg_defs.h @@ -123,6 +123,4 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define VLV_DISPLAY_BASE 0x180000 -#define GEN12_SFC_DONE_MAX 4 - #endif /* __I915_REG_DEFS__ */ |