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author | Matthew Brost <matthew.brost@intel.com> | 2021-07-27 03:23:47 +0300 |
---|---|---|
committer | John Harrison <John.C.Harrison@Intel.com> | 2021-07-28 03:32:27 +0300 |
commit | ee242ca704d386991d7ece0c46134e211d52412b (patch) | |
tree | ac620f863b4c8ade9ff4fb64a9a5f7928241c394 /drivers/gpu/drm/i915/i915_scheduler_types.h | |
parent | 3a7b72665ea5dcfa24efe857dbb88fe135ae21a6 (diff) | |
download | linux-ee242ca704d386991d7ece0c46134e211d52412b.tar.xz |
drm/i915/guc: Implement GuC priority management
Implement a simple static mapping algorithm of the i915 priority levels
(int, -1k to 1k exposed to user) to the 4 GuC levels. Mapping is as
follows:
i915 level < 0 -> GuC low level (3)
i915 level == 0 -> GuC normal level (2)
i915 level < INT_MAX -> GuC high level (1)
i915 level == INT_MAX -> GuC highest level (0)
We believe this mapping should cover the UMD use cases (3 distinct user
levels + 1 kernel level).
In addition to static mapping, a simple counter system is attached to
each context tracking the number of requests inflight on the context at
each level. This is needed as the GuC levels are per context while in
the i915 levels are per request.
v2:
(Daniele)
- Add BUILD_BUG_ON to enforce ordering of priority levels
- Add missing lockdep to guc_prio_fini
- Check for return before setting context registered flag
- Map DISPLAY priority or higher to highest guc prio
- Update comment for guc_prio
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210727002348.97202-33-matthew.brost@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_scheduler_types.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_scheduler_types.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_scheduler_types.h b/drivers/gpu/drm/i915/i915_scheduler_types.h index eaef233e9080..b0a1b58c7893 100644 --- a/drivers/gpu/drm/i915/i915_scheduler_types.h +++ b/drivers/gpu/drm/i915/i915_scheduler_types.h @@ -180,6 +180,18 @@ struct i915_sched_engine { int prio); /** + * @bump_inflight_request_prio: update priority of an inflight request + */ + void (*bump_inflight_request_prio)(struct i915_request *rq, + int prio); + + /** + * @retire_inflight_request_prio: indicate request is retired to + * priority tracking + */ + void (*retire_inflight_request_prio)(struct i915_request *rq); + + /** * @schedule: adjust priority of request * * Call when the priority on a request has changed and it and its |