diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-04-12 14:01:59 +0300 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-04-12 16:32:11 +0300 |
| commit | 0edda1d6813b7ac30593b93edea2daeb2c47ef91 (patch) | |
| tree | daccee7c594adfa127cc317b070918c7e0eaacb1 /drivers/gpu/drm/i915/intel_lrc.c | |
| parent | fa9d38f65d3976d8594e84edb0edcdfc75054b17 (diff) | |
| download | linux-0edda1d6813b7ac30593b93edea2daeb2c47ef91.tar.xz | |
drm/i915: Flush the CSB pointer reset
The HW resets it CSB tail pointer on resetting the engine. Most of the
time. In case it doesn't (and for system resume) we write the expected
value anyway. For extra paranoia, flush the write before we invalidate
the cacheline.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190412110159.10495-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 3cb788a223ef..4e0a351bfbca 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1866,6 +1866,7 @@ static void reset_csb_pointers(struct intel_engine_execlists *execlists) */ execlists->csb_head = reset_value; WRITE_ONCE(*execlists->csb_write, reset_value); + wmb(); /* Make sure this is visible to HW (paranoia?) */ invalidate_csb_entries(&execlists->csb_status[0], &execlists->csb_status[reset_value]); |