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author | José Roberto de Souza <jose.souza@intel.com> | 2021-05-14 18:37:08 +0300 |
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committer | Matt Roper <matthew.d.roper@intel.com> | 2021-05-15 05:48:38 +0300 |
commit | b2c6eaf27b508ce5f63e59e3cfb6ae0231685eee (patch) | |
tree | 2f85ce93786b88bc624ecb89711c69a131315aaf /drivers/gpu/drm/i915/intel_step.c | |
parent | d961eb20adb642c62ad588666e84444240ef6288 (diff) | |
download | linux-b2c6eaf27b508ce5f63e59e3cfb6ae0231685eee.tar.xz |
drm/i915/adl_p: Add IPs stepping mapping
This will allow us to better implement workarounds.
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210514153711.2359617-17-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_step.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_step.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c index 4d71547a5b83..ba9479a67521 100644 --- a/drivers/gpu/drm/i915/intel_step.c +++ b/drivers/gpu/drm/i915/intel_step.c @@ -47,6 +47,13 @@ static const struct intel_step_info adls_revid_step_tbl[] = { [0xC] = { .gt_step = STEP_D0, .display_step = STEP_C0 }, }; +static const struct intel_step_info adlp_revid_step_tbl[] = { + [0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 }, + [0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 }, + [0x8] = { .gt_step = STEP_C0, .display_step = STEP_C0 }, + [0xC] = { .gt_step = STEP_C0, .display_step = STEP_D0 }, +}; + void intel_step_init(struct drm_i915_private *i915) { const struct intel_step_info *revids = NULL; @@ -54,7 +61,10 @@ void intel_step_init(struct drm_i915_private *i915) int revid = INTEL_REVID(i915); struct intel_step_info step = {}; - if (IS_ALDERLAKE_S(i915)) { + if (IS_ALDERLAKE_P(i915)) { + revids = adlp_revid_step_tbl; + size = ARRAY_SIZE(adlp_revid_step_tbl); + } else if (IS_ALDERLAKE_S(i915)) { revids = adls_revid_step_tbl; size = ARRAY_SIZE(adls_revid_step_tbl); } else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) { |