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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2024-02-15 11:53:16 +0300 |
|---|---|---|
| committer | Chun-Kuang Hu <chunkuang.hu@kernel.org> | 2024-02-19 17:49:51 +0300 |
| commit | e14cba94bc19ff78545d87a6f85b871cf012df3f (patch) | |
| tree | 52f76f85d3308fe658ff94e3b36131a78a97dda0 /drivers/gpu/drm/mediatek | |
| parent | 2aa9514adf4faa07019d2de1ca042954cdd70b42 (diff) | |
| download | linux-e14cba94bc19ff78545d87a6f85b871cf012df3f.tar.xz | |
drm/mediatek: dsi: Use mipi_dsi_pixel_format_to_bpp() helper function
Instead of open coding, use the mipi_dsi_pixel_format_to_bpp() helper
function from drm_mipi_dsi.h in mtk_dsi_poweron() and for validation
in mtk_dsi_bridge_mode_valid().
Note that this function changes the behavior of this driver: previously,
in case of unknown formats, it would (wrongly) assume that it should
account for a 24-bits format - now it will return an error and refuse
to set clocks and/or enable the DSI.
This is done because setting the wrong data rate will only produce a
garbage output that the display will misinterpret both because this
driver doesn't actually provide any extra-spec format support and/or
because the data rate (hence, the HS clock) will be wrong.
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20240215085316.56835-10-angelogioacchino.delregno@collabora.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/mediatek')
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_dsi.c | 26 |
1 files changed, 9 insertions, 17 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index b644505de98a..9501f4019199 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -598,19 +598,12 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) if (++dsi->refcount != 1) return 0; - switch (dsi->format) { - case MIPI_DSI_FMT_RGB565: - bit_per_pixel = 16; - break; - case MIPI_DSI_FMT_RGB666_PACKED: - bit_per_pixel = 18; - break; - case MIPI_DSI_FMT_RGB666: - case MIPI_DSI_FMT_RGB888: - default: - bit_per_pixel = 24; - break; + ret = mipi_dsi_pixel_format_to_bpp(dsi->format); + if (ret < 0) { + dev_err(dev, "Unknown MIPI DSI format %d\n", dsi->format); + return ret; } + bit_per_pixel = ret; dsi->data_rate = DIV_ROUND_UP_ULL(dsi->vm.pixelclock * bit_per_pixel, dsi->lanes); @@ -793,12 +786,11 @@ mtk_dsi_bridge_mode_valid(struct drm_bridge *bridge, const struct drm_display_mode *mode) { struct mtk_dsi *dsi = bridge_to_dsi(bridge); - u32 bpp; + int bpp; - if (dsi->format == MIPI_DSI_FMT_RGB565) - bpp = 16; - else - bpp = 24; + bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); + if (bpp < 0) + return MODE_ERROR; if (mode->clock * bpp / dsi->lanes > 1500000) return MODE_CLOCK_HIGH; |