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| author | Dave Airlie <airlied@redhat.com> | 2023-08-24 03:15:58 +0300 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2023-08-24 03:15:59 +0300 |
| commit | 38f88732b2928a831d794737b499c6db8da9b9ac (patch) | |
| tree | 368635f819831e4ced4754f1afd80a1d5e557f20 /drivers/gpu/drm/msm/msm_drv.h | |
| parent | fdebffeba8b877368ddcc139c26278c1c97931a4 (diff) | |
| parent | 34b149ecae852d13ae3275e707fce93081ef5e4a (diff) | |
| download | linux-38f88732b2928a831d794737b499c6db8da9b9ac.tar.xz | |
Merge tag 'drm-msm-next-2023-08-20' of https://gitlab.freedesktop.org/drm/msm into drm-next
Updates for v6.6, which includes a backmerge of msm-fixes to avoid conficts.
Core:
- SM6125 MDSS support
DPU:
- SM6125 DPU support
- Added subblocks to display snapshot
- Use UBWC data from MDSS driver rather than duplicating it
- dpu_core_perf cleanup
DSI:
- Enabled burst mode to fix CMD mode panels
- Runtime PM support
- refgen regulator support
DSI PHY:
- SM6125 support in 14nm DSI PHY driver
GPU:
- Rework GPU identification to prepare for a7xx, and other a7xx prep
- Cleanups and fixes
- Disallow legacy relocs on a6xx and newer
- a690: switch to using a660_gmu.bin fw as this is what we have in
linux-firmware and we see no evidence that it should be different
from other a660 family (a6xx subgen 4) devices
- Submit overhead opts, 1.6x faster for NO_IMPLICIT_SYNC commits with
100 BOs to 2.5x faster for 1000 BOs
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGv_01g-edjdfKLWWcb-rO5aSyLsv5FpbKrTkXVL9+ngTQ@mail.gmail.com
Diffstat (limited to 'drivers/gpu/drm/msm/msm_drv.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_drv.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 44c9e06f2dff..02fd6c7d0bb7 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -65,6 +65,12 @@ enum msm_dp_controller { MSM_DP_CONTROLLER_COUNT, }; +enum msm_dsi_controller { + MSM_DSI_CONTROLLER_0, + MSM_DSI_CONTROLLER_1, + MSM_DSI_CONTROLLER_COUNT, +}; + #define MSM_GPU_MAX_RINGS 4 #define MAX_H_TILES_PER_DISPLAY 2 @@ -97,7 +103,6 @@ struct msm_display_topology { /* Commit/Event thread specific structure */ struct msm_drm_thread { struct drm_device *dev; - unsigned int crtc_id; struct kthread_worker *worker; }; @@ -117,7 +122,7 @@ struct msm_drm_private { struct hdmi *hdmi; /* DSI is shared by mdp4 and mdp5 */ - struct msm_dsi *dsi[2]; + struct msm_dsi *dsi[MSM_DSI_CONTROLLER_COUNT]; struct msm_dp *dp[MSM_DP_CONTROLLER_COUNT]; @@ -198,7 +203,6 @@ struct msm_drm_private { struct workqueue_struct *wq; unsigned int num_crtcs; - struct drm_crtc *crtcs[MAX_CRTCS]; struct msm_drm_thread event_thread[MAX_CRTCS]; |