summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/mxsfb/lcdif_regs.h
diff options
context:
space:
mode:
authorMarek Vasut <marex@denx.de>2022-11-01 18:26:29 +0300
committerMarek Vasut <marex@denx.de>2022-11-09 03:31:45 +0300
commite3cac8f7749f78dacdf19c00ed5862a1db52239f (patch)
tree1e3d4cc8a18a140f91b47a1bcf7fb788a4ae7dd1 /drivers/gpu/drm/mxsfb/lcdif_regs.h
parent1a0257c352638916fdaffaac2ddedb8e049312f3 (diff)
downloadlinux-e3cac8f7749f78dacdf19c00ed5862a1db52239f.tar.xz
drm: lcdif: Set and enable FIFO Panic threshold
In case the LCDIFv3 is used to drive a 4k panel via i.MX8MP HDMI bridge, the LCDIFv3 becomes susceptible to FIFO underflows, these lead to nasty flicker of the image on the panel, or image being shifted by half frame horizontally every second frame. The flicker can be easily triggered by running 3D application on top of weston compositor, like neverball or chromium. Surprisingly glmark2-es2-wayland or glmark2-es2-drm does not trigger this effect so easily. Configure the FIFO Panic threshold register and enable the FIFO Panic mode, which internally boosts the NoC interconnect priority for LCDIFv3 transactions in case of possible underflow. This mitigates the flicker effect on 4k panels as well. Fixes: 9db35bb349a0 ("drm: lcdif: Add support for i.MX8MP LCDIF variant") Signed-off-by: Marek Vasut <marex@denx.de> Tested-by: Liu Ying <victor.liu@nxp.com> # i.MX8mp EVK Reviewed-by: Liu Ying <victor.liu@nxp.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221101152629.21768-1-marex@denx.de
Diffstat (limited to 'drivers/gpu/drm/mxsfb/lcdif_regs.h')
-rw-r--r--drivers/gpu/drm/mxsfb/lcdif_regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mxsfb/lcdif_regs.h b/drivers/gpu/drm/mxsfb/lcdif_regs.h
index fb74eb5ccbf1..c55dfb236c1d 100644
--- a/drivers/gpu/drm/mxsfb/lcdif_regs.h
+++ b/drivers/gpu/drm/mxsfb/lcdif_regs.h
@@ -255,6 +255,7 @@
#define PANIC0_THRES_LOW_MASK GENMASK(24, 16)
#define PANIC0_THRES_HIGH_MASK GENMASK(8, 0)
+#define PANIC0_THRES_MAX 511
#define LCDIF_MIN_XRES 120
#define LCDIF_MIN_YRES 120