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| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2017-06-13 12:02:10 +0300 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2017-08-23 12:22:09 +0300 |
| commit | 0c43f1e02598d304d4cfb06187305445c8207675 (patch) | |
| tree | 882a3af2f67b84292cfdff5db2961ab69219b865 /drivers/gpu/drm/omapdrm/dss/video-pll.c | |
| parent | beea6214d1cc5bb08ce25ffe06b57fb948445bed (diff) | |
| download | linux-0c43f1e02598d304d4cfb06187305445c8207675.tar.xz | |
drm/omap: fix i886 work-around
7d267f068a8b4944d52e8b0ae4c8fcc1c1c5c5ba ("drm/omap: work-around for
errata i886") changed how the PLL dividers and multipliers are
calculated. While the new way should work fine for all the PLLs, it
breaks omap5 PLLs. The issues seen are rather odd: seemed that the
output clock rate is half of what we asked. It is unclear what's causing
there issues.
As a work-around this patch adds a "errata_i886" flag, which is set only
for DRA7's PLLs, and the PLL setup is done according to that flag.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm/dss/video-pll.c')
| -rw-r--r-- | drivers/gpu/drm/omapdrm/dss/video-pll.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/video-pll.c b/drivers/gpu/drm/omapdrm/dss/video-pll.c index f7ea02a88b1a..38a239cc5e04 100644 --- a/drivers/gpu/drm/omapdrm/dss/video-pll.c +++ b/drivers/gpu/drm/omapdrm/dss/video-pll.c @@ -130,6 +130,8 @@ static const struct dss_pll_hw dss_dra7_video_pll_hw = { .mX_lsb[3] = 5, .has_refsel = true, + + .errata_i886 = true, }; struct dss_pll *dss_video_pll_init(struct platform_device *pdev, int id, |