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| author | Thierry Reding <treding@nvidia.com> | 2015-07-21 17:33:48 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-10-28 13:18:44 +0300 |
| commit | c728e2d4a6546905f1179a8237860d8d276aaadc (patch) | |
| tree | f2d9a04f94615a5a73cc84f1371eeecf709675b2 /drivers/gpu/drm/tegra/dp.h | |
| parent | 1abd6b3304d47ff055063e0d59fc03bb27e0e196 (diff) | |
| download | linux-c728e2d4a6546905f1179a8237860d8d276aaadc.tar.xz | |
drm/tegra: dp: Track link capabilities alongside settings
Store capabilities in max_* fields and add separate fields for the
currently selected settings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dp.h')
| -rw-r--r-- | drivers/gpu/drm/tegra/dp.h | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/drm/tegra/dp.h b/drivers/gpu/drm/tegra/dp.h index 1cf252e7309a..ec0342d4c95e 100644 --- a/drivers/gpu/drm/tegra/dp.h +++ b/drivers/gpu/drm/tegra/dp.h @@ -12,17 +12,22 @@ struct drm_dp_aux; #define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0) /** - * struct drm_dp_link - DP link capabilities + * struct drm_dp_link - DP link capabilities and configuration * @revision: DP specification revision supported on the link - * @rate: maximum clock rate supported on the link - * @num_lanes: maximum number of lanes supported on the link + * @max_rate: maximum clock rate supported on the link + * @max_lanes: maximum number of lanes supported on the link * @capabilities: bitmask of capabilities supported on the link + * @rate: currently configured link rate + * @lanes: currently configured number of lanes */ struct drm_dp_link { unsigned char revision; - unsigned int rate; - unsigned int num_lanes; + unsigned int max_rate; + unsigned int max_lanes; unsigned long capabilities; + + unsigned int rate; + unsigned int lanes; }; int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link); |