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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-08-27 17:23:29 +0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-09-08 21:15:42 +0300 |
commit | f993406182b3ffad7c53ffc180b65e2b7e3d8986 (patch) | |
tree | b9af53c4432b56e2893feeb8f3c9d70e2274262f /drivers/gpu/drm/tegra/dpaux.c | |
parent | 1f75b29d3fc9abb06b095860f9312f8190e6015b (diff) | |
download | linux-f993406182b3ffad7c53ffc180b65e2b7e3d8986.tar.xz |
drm/tegra: Handle I2C_WRITE_STATUS_UPDATE for address only writes
A address-only I2C_WRITE can't be replied with a short i2c ack, but I
suppose it could be replied with an i2c defer. So the code should be
prepared for an address-only I2C_WRITE_STATUS_UPDATE.
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/tegra/dpaux.c')
-rw-r--r-- | drivers/gpu/drm/tegra/dpaux.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c index 1cc09ff14a4f..6aecb6647313 100644 --- a/drivers/gpu/drm/tegra/dpaux.c +++ b/drivers/gpu/drm/tegra/dpaux.c @@ -119,6 +119,7 @@ static ssize_t tegra_dpaux_transfer(struct drm_dp_aux *aux, */ if (msg->size < 1) { switch (msg->request & ~DP_AUX_I2C_MOT) { + case DP_AUX_I2C_WRITE_STATUS_UPDATE: case DP_AUX_I2C_WRITE: case DP_AUX_I2C_READ: value = DPAUX_DP_AUXCTL_CMD_ADDRESS_ONLY; |