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authorThierry Reding <treding@nvidia.com>2014-06-03 16:48:12 +0400
committerThierry Reding <treding@nvidia.com>2014-08-04 12:07:34 +0400
commitc134f019abcfaa1cb6e07f6154e92a4f8ce8ddd8 (patch)
tree0d26c79eefb921fd0841b9d48c48b589a3ad2f8a /drivers/gpu/drm/tegra/gem.h
parent0c6b1e4ba74f58ee1507d456e52c630b4b8ff174 (diff)
downloadlinux-c134f019abcfaa1cb6e07f6154e92a4f8ce8ddd8.tar.xz
drm/tegra: Implement more tiling modes
Tegra124 supports a block-linear mode in addition to the regular pitch linear and tiled modes. Add support for these by moving the internal representation into a structure rather than a simple flag. Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/gem.h')
-rw-r--r--drivers/gpu/drm/tegra/gem.h16
1 files changed, 14 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tegra/gem.h b/drivers/gpu/drm/tegra/gem.h
index 2f3fe96c5154..43a25c853357 100644
--- a/drivers/gpu/drm/tegra/gem.h
+++ b/drivers/gpu/drm/tegra/gem.h
@@ -16,8 +16,18 @@
#include <drm/drm.h>
#include <drm/drmP.h>
-#define TEGRA_BO_TILED (1 << 0)
-#define TEGRA_BO_BOTTOM_UP (1 << 1)
+#define TEGRA_BO_BOTTOM_UP (1 << 0)
+
+enum tegra_bo_tiling_mode {
+ TEGRA_BO_TILING_MODE_PITCH,
+ TEGRA_BO_TILING_MODE_TILED,
+ TEGRA_BO_TILING_MODE_BLOCK,
+};
+
+struct tegra_bo_tiling {
+ enum tegra_bo_tiling_mode mode;
+ unsigned long value;
+};
struct tegra_bo {
struct drm_gem_object gem;
@@ -26,6 +36,8 @@ struct tegra_bo {
struct sg_table *sgt;
dma_addr_t paddr;
void *vaddr;
+
+ struct tegra_bo_tiling tiling;
};
static inline struct tegra_bo *to_tegra_bo(struct drm_gem_object *gem)