diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2023-11-02 15:48:55 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:43:33 +0300 |
| commit | 5d30cfe003a98d2f4ad28fe27226f3f2e6784c65 (patch) | |
| tree | 9572f8e1673e71784c33a50c301e7d807234c445 /drivers/gpu/drm/xe/regs | |
| parent | effc560d7a36b8c59219dd5374d9725a9edd85c4 (diff) | |
| download | linux-5d30cfe003a98d2f4ad28fe27226f3f2e6784c65.tar.xz | |
drm/xe: Add Wa_14019821291
This workaround is primarily implemented by the BIOS. However if the
BIOS applies the workaround it will reserve a small piece of our DSM
(which should be at the top, right below the WOPCM); we just need to
keep that region reserved so that nothing else attempts to re-use it.
v2 (Gustavo):
- Check for NULL media_gt
- Mask bits [5:0] to avoid potential issues in future platforms
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/20231102124855.1940491-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/regs')
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index 7a6407e38265..902c60543de0 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -158,6 +158,8 @@ #define XEHP_SQCM XE_REG_MCR(0x8724) #define EN_32B_ACCESS REG_BIT(30) +#define GSCPSMI_BASE XE_REG(0x880c) + #define MIRROR_FUSE3 XE_REG(0x9118) #define XE2_NODE_ENABLE_MASK REG_GENMASK(31, 16) #define L3BANK_PAIR_COUNT 4 |