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author | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2023-11-16 18:12:42 +0300 |
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committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:44:39 +0300 |
commit | cac74742faea603b288592be118b4f100ed2c863 (patch) | |
tree | 27a3dd6982637ef79f4036f3e1b742a2183453ba /drivers/gpu/drm/xe/xe_guc.c | |
parent | 1d087cb7d81f9a17760154eef5ac8b894428cdbe (diff) | |
download | linux-cac74742faea603b288592be118b4f100ed2c863.tar.xz |
drm/xe/guc: Use valid scratch register for posting read
There are only 4 scratch registers VF_SW_FLAG(0..3) on each GuC.
We shouldn't use non-existing register VF_SW_FLAG(4) for posting
read.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_guc.c')
-rw-r--r-- | drivers/gpu/drm/xe/xe_guc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c index 56edcb2b0e45..6de2ab05bf4e 100644 --- a/drivers/gpu/drm/xe/xe_guc.c +++ b/drivers/gpu/drm/xe/xe_guc.c @@ -615,7 +615,7 @@ int xe_guc_mmio_send_recv(struct xe_guc *guc, const u32 *request, u32 header, reply; struct xe_reg reply_reg = xe_gt_is_media_type(gt) ? MED_VF_SW_FLAG(0) : VF_SW_FLAG(0); - const u32 LAST_INDEX = VF_SW_FLAG_COUNT; + const u32 LAST_INDEX = VF_SW_FLAG_COUNT - 1; int ret; int i; |