summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/xe/xe_guc_ads.c
diff options
context:
space:
mode:
authorLucas De Marchi <lucas.demarchi@intel.com>2023-04-28 01:32:48 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-20 02:32:15 +0300
commitd9b79ad275e7a98c566b3ac4b32950142d6bf9ad (patch)
tree787a2885b7b78c60c71bb33345d61f09a7c3926b /drivers/gpu/drm/xe/xe_guc_ads.c
parent7b829f6dd638c2cb45c7710bc7cd1d0395ea9bc1 (diff)
downloadlinux-d9b79ad275e7a98c566b3ac4b32950142d6bf9ad.tar.xz
drm/xe: Drop gen afixes from registers
The defines for the registers were brought over from i915 while bootstrapping the driver. As xe supports TGL and later only, it doesn't make sense to keep the GEN* prefixes and suffixes in the registers: TGL is graphics version 12, previously called "GEN12". So drop the prefix everywhere. v2: - Also drop _TGL suffix and reword commit message as suggested by Matt Roper. While at it, rename VSUNIT_CLKGATE_DIS_TGL to VSUNIT_CLKGATE2_DIS with the additional "2", so it doesn't clash with the define for the other register Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20230427223256.1432787-3-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_guc_ads.c')
-rw-r--r--drivers/gpu/drm/xe/xe_guc_ads.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index d4fc2d357a78..6a723bda2aa9 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -450,10 +450,10 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
u32 flags;
bool skip;
} *e, extra_regs[] = {
- { .reg = RING_MODE_GEN7(hwe->mmio_base).reg, },
+ { .reg = RING_MODE(hwe->mmio_base).reg, },
{ .reg = RING_HWS_PGA(hwe->mmio_base).reg, },
{ .reg = RING_IMR(hwe->mmio_base).reg, },
- { .reg = GEN12_RCU_MODE.reg, .flags = 0x3,
+ { .reg = RCU_MODE.reg, .flags = 0x3,
.skip = hwe != hwe_rcs_reset_domain },
};
u32 i;
@@ -478,7 +478,8 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
if (needs_wa_1607983814(xe) && hwe->class == XE_ENGINE_CLASS_RENDER) {
for (i = 0; i < LNCFCMOCS_REG_COUNT; i++) {
guc_mmio_regset_write_one(ads, regset_map,
- GEN9_LNCFCMOCS(i).reg, 0, count++);
+ LNCFCMOCS(i).reg, 0,
+ count++);
}
}
@@ -557,11 +558,11 @@ static void guc_doorbell_init(struct xe_guc_ads *ads)
if (GRAPHICS_VER(xe) >= 12 && !IS_DGFX(xe)) {
u32 distdbreg =
- xe_mmio_read32(gt, GEN12_DIST_DBS_POPULATED.reg);
+ xe_mmio_read32(gt, DIST_DBS_POPULATED.reg);
ads_blob_write(ads,
system_info.generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_DOORBELL_COUNT_PER_SQIDI],
- REG_FIELD_GET(GEN12_DOORBELLS_PER_SQIDI_MASK, distdbreg) + 1);
+ REG_FIELD_GET(DOORBELLS_PER_SQIDI_MASK, distdbreg) + 1);
}
}