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| author | Matthew Brost <matthew.brost@intel.com> | 2024-01-25 02:44:13 +0300 |
|---|---|---|
| committer | Thomas Hellström <thomas.hellstrom@linux.intel.com> | 2024-02-01 13:26:15 +0300 |
| commit | efeff7b38ef62fc65069bd2200d151a9d5d38907 (patch) | |
| tree | 510a8d7aae7a15bcae29536ae4c680f1e92183a4 /drivers/gpu/drm/xe/xe_guc_hwconfig.c | |
| parent | 6d2096239af11f1c9fa03e8fc74400ce048078b0 (diff) | |
| download | linux-efeff7b38ef62fc65069bd2200d151a9d5d38907.tar.xz | |
drm/xe: Only allow 1 ufence per exec / bind IOCTL
The way exec ufences are coded only 1 ufence per IOCTL will be signaled.
It is possible to fix this but for current use cases 1 ufence per IOCTL
is sufficient. Enforce a limit of 1 ufence per IOCTL (both exec and bind
to be uniform).
v2:
- Add fixes tag (Thomas)
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Brian Welty <brian.welty@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240124234413.1640825-1-matthew.brost@intel.com
(cherry picked from commit d1df9bfbf68c65418f30917f406b6d5bd597714e)
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_guc_hwconfig.c')
0 files changed, 0 insertions, 0 deletions