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| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-05-26 19:43:41 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-20 02:34:02 +0300 |
| commit | 91042671d9f3102c7e100d2e9275cae13eb63462 (patch) | |
| tree | b5e067272e797d512fa4a679d6c457b0c19c1c8b /drivers/gpu/drm/xe/xe_hw_engine.c | |
| parent | cc982f0c168149def829f204b575fad546e9d043 (diff) | |
| download | linux-91042671d9f3102c7e100d2e9275cae13eb63462.tar.xz | |
drm/xe/rtp: Add "_sr" to entry/function names
The xe_rtp_process() function and xe_rtp_entry depend on the
save-restore struct. In future it will be desired to process rtp rules,
regardless of adding them to a save-restore. Rename the struct and
function so the intent is clear and the name is freed for future uses.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230526164358.86393-5-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_hw_engine.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_hw_engine.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index 25b96f40d5a7..7e4b0b465244 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -282,7 +282,7 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe) u32 blit_cctl_val = REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, mocs_write_idx) | REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, mocs_read_idx); struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe); - const struct xe_rtp_entry lrc_was[] = { + const struct xe_rtp_entry_sr lrc_was[] = { /* * Some blitter commands do not have a field for MOCS, those * commands will use MOCS index pointed by BLIT_CCTL. @@ -300,7 +300,7 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe) {} }; - xe_rtp_process(&ctx, lrc_was, &hwe->reg_lrc); + xe_rtp_process_to_sr(&ctx, lrc_was, &hwe->reg_lrc); } static void @@ -313,7 +313,7 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe) u32 ring_cmd_cctl_val = REG_FIELD_PREP(CMD_CCTL_WRITE_OVERRIDE_MASK, mocs_write_idx) | REG_FIELD_PREP(CMD_CCTL_READ_OVERRIDE_MASK, mocs_read_idx); struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe); - const struct xe_rtp_entry engine_entries[] = { + const struct xe_rtp_entry_sr engine_entries[] = { /* * RING_CMD_CCTL specifies the default MOCS entry that will be * used by the command streamer when executing commands that @@ -334,7 +334,7 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe) {} }; - xe_rtp_process(&ctx, engine_entries, &hwe->reg_sr); + xe_rtp_process_to_sr(&ctx, engine_entries, &hwe->reg_sr); } static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, |