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authorNiranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>2023-05-16 06:26:53 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-20 02:34:01 +0300
commit1b1d3710380d5f0517dcaabe1b96b6401f68ec37 (patch)
tree3c58bafc2a821c4f033e78dfa64be24565965bc4 /drivers/gpu/drm/xe/xe_mmio.c
parent6ed6ba32dba14ef851ecb7190597d6bac77618e2 (diff)
downloadlinux-1b1d3710380d5f0517dcaabe1b96b6401f68ec37.tar.xz
drm/xe: Apply upper limit to sg element size
The iommu_dma_map_sg() function ensures iova allocation doesn't cross dma segment boundary. It does so by padding some sg elements. This can cause overflow, ending up with sg->length being set to 0. Avoid this by halving the maximum segment size (rounded down to PAGE_SIZE). Specify maximum segment size for sg elements by using sg_alloc_table_from_pages_segment() to allocate sg_table. v2: Use correct max segment size in dma_set_max_seg_size() call Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> Reviewed-by: Bruce Chang <yu.bruce.chang@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_mmio.c')
-rw-r--r--drivers/gpu/drm/xe/xe_mmio.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index c7fbb1cc1f64..4c270a07136e 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -11,6 +11,7 @@
#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
#include "regs/xe_regs.h"
+#include "xe_bo.h"
#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_mcr.h"
@@ -26,11 +27,7 @@ static int xe_set_dma_info(struct xe_device *xe)
unsigned int mask_size = xe->info.dma_mask_size;
int err;
- /*
- * We don't have a max segment size, so set it to the max so sg's
- * debugging layer doesn't complain
- */
- dma_set_max_seg_size(xe->drm.dev, UINT_MAX);
+ dma_set_max_seg_size(xe->drm.dev, xe_sg_segment_size(xe->drm.dev));
err = dma_set_mask(xe->drm.dev, DMA_BIT_MASK(mask_size));
if (err)