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| author | Matt Roper <matthew.d.roper@intel.com> | 2023-06-02 00:52:15 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-20 02:34:11 +0300 |
| commit | a5edc7cdb3875115d1798f4d2057569cf257e7d2 (patch) | |
| tree | bdde4b5283179ceb35be1b995630d1b51befe2c4 /drivers/gpu/drm/xe/xe_mmio.c | |
| parent | dbc4f5d15a8eecf0f5e7ba1a8e563c31237f6adb (diff) | |
| download | linux-a5edc7cdb3875115d1798f4d2057569cf257e7d2.tar.xz | |
drm/xe: Introduce xe_tile
Create a new xe_tile structure to begin separating the concept of "tile"
from "GT." A tile is effectively a complete GPU, and a GT is just one
part of that. On platforms like MTL, there's only a single full GPU
(tile) which has its IP blocks provided by two GTs. In contrast, a
"multi-tile" platform like PVC is basically multiple complete GPUs
packed behind a single PCI device.
For now, just create xe_tile as a simple wrapper around xe_gt. The
items in xe_gt that are truly tied to the tile rather than the GT will
be moved in future patches. Support for multiple GTs per tile (i.e.,
the MTL standalone media case) will also be re-introduced in a future
patch.
v2:
- Fix kunit test build
- Move hunk from next patch to use local tile variable rather than
direct xe->tiles[id] accesses. (Lucas)
- Mention compute in kerneldoc. (Rodrigo)
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230601215244.678611-3-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_mmio.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_mmio.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c index ef2353eef6fe..9bc5715e9ebe 100644 --- a/drivers/gpu/drm/xe/xe_mmio.c +++ b/drivers/gpu/drm/xe/xe_mmio.c @@ -438,6 +438,7 @@ int xe_mmio_ioctl(struct drm_device *dev, void *data, struct drm_file *file) { struct xe_device *xe = to_xe_device(dev); + struct xe_gt *gt = xe_device_get_gt(xe, 0); struct drm_xe_mmio *args = data; unsigned int bits_flag, bytes; struct xe_reg reg; @@ -480,7 +481,7 @@ int xe_mmio_ioctl(struct drm_device *dev, void *data, */ reg = XE_REG(args->addr); - xe_force_wake_get(gt_to_fw(&xe->gt[0]), XE_FORCEWAKE_ALL); + xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL); if (args->flags & DRM_XE_MMIO_WRITE) { switch (bits_flag) { @@ -489,10 +490,10 @@ int xe_mmio_ioctl(struct drm_device *dev, void *data, ret = -EINVAL; goto exit; } - xe_mmio_write32(to_gt(xe), reg, args->value); + xe_mmio_write32(gt, reg, args->value); break; case DRM_XE_MMIO_64BIT: - xe_mmio_write64(to_gt(xe), reg, args->value); + xe_mmio_write64(gt, reg, args->value); break; default: drm_dbg(&xe->drm, "Invalid MMIO bit size"); @@ -507,10 +508,10 @@ int xe_mmio_ioctl(struct drm_device *dev, void *data, if (args->flags & DRM_XE_MMIO_READ) { switch (bits_flag) { case DRM_XE_MMIO_32BIT: - args->value = xe_mmio_read32(to_gt(xe), reg); + args->value = xe_mmio_read32(gt, reg); break; case DRM_XE_MMIO_64BIT: - args->value = xe_mmio_read64(to_gt(xe), reg); + args->value = xe_mmio_read64(gt, reg); break; default: drm_dbg(&xe->drm, "Invalid MMIO bit size"); @@ -522,7 +523,7 @@ int xe_mmio_ioctl(struct drm_device *dev, void *data, } exit: - xe_force_wake_put(gt_to_fw(&xe->gt[0]), XE_FORCEWAKE_ALL); + xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL); return ret; } |