diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-09-09 01:52:27 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:41:06 +0300 |
| commit | 9fa81f914a1ce8ee7a5a0ce6f275a636a15bb109 (patch) | |
| tree | 3a11e36ad0240423e7a6f1d20ebf85a69683dc1b /drivers/gpu/drm/xe/xe_mmio.h | |
| parent | 9e6fe003d8c7e35bcd93f0a962b8fdc8889db35b (diff) | |
| download | linux-9fa81f914a1ce8ee7a5a0ce6f275a636a15bb109.tar.xz | |
drm/xe/mmio: Account for GSI offset when checking ranges
Change xe_mmio_in_range() to use the same logic to account for the GT's
adj_offset as the read and write functions. This is needed when checking
ranges for the MCR registers if the GT has an offset to adjust.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230908225227.1276610-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_mmio.h')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_mmio.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h index cd9fe08ccf4a..9e0fd4a6fb29 100644 --- a/drivers/gpu/drm/xe/xe_mmio.h +++ b/drivers/gpu/drm/xe/xe_mmio.h @@ -127,9 +127,13 @@ static inline int xe_mmio_wait32(struct xe_gt *gt, struct xe_reg reg, u32 mask, int xe_mmio_ioctl(struct drm_device *dev, void *data, struct drm_file *file); -static inline bool xe_mmio_in_range(const struct xe_mmio_range *range, +static inline bool xe_mmio_in_range(const struct xe_gt *gt, + const struct xe_mmio_range *range, struct xe_reg reg) { + if (reg.addr < gt->mmio.adj_limit) + reg.addr += gt->mmio.adj_offset; + return range && reg.addr >= range->start && reg.addr <= range->end; } |