summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/xe/xe_mocs.c
diff options
context:
space:
mode:
authorMatt Roper <matthew.d.roper@intel.com>2023-10-23 23:41:13 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-21 19:43:22 +0300
commit83af834e711ce779afb1ee6a28977b3e4b164354 (patch)
treeab9b65f3c893f9b61f959e6b1e6d695d7f6f4913 /drivers/gpu/drm/xe/xe_mocs.c
parentfb24b858a20d720b7ee4396225569ff33a8a4fe3 (diff)
downloadlinux-83af834e711ce779afb1ee6a28977b3e4b164354.tar.xz
drm/xe/mocs: MOCS registers are multicast on Xe_HP and beyond
The MOCS registers should be written in an MCR-specific manner on Xe_HP and beyond to prevent any other driver threads or external firmware from putting the hardware into unicast mode while we initialize the MOCS table. Bspec: 66534, 67609, 71185 Cc: Ruthuvikas Ravikumar <ruthuvikas.ravikumar@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://lore.kernel.org/r/20231023204112.2856331-2-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_mocs.c')
-rw-r--r--drivers/gpu/drm/xe/xe_mocs.c23
1 files changed, 15 insertions, 8 deletions
diff --git a/drivers/gpu/drm/xe/xe_mocs.c b/drivers/gpu/drm/xe/xe_mocs.c
index 19a8146ded9a..21972bbef8fd 100644
--- a/drivers/gpu/drm/xe/xe_mocs.c
+++ b/drivers/gpu/drm/xe/xe_mocs.c
@@ -10,6 +10,7 @@
#include "xe_device.h"
#include "xe_exec_queue.h"
#include "xe_gt.h"
+#include "xe_gt_mcr.h"
#include "xe_mmio.h"
#include "xe_platform_types.h"
#include "xe_step_types.h"
@@ -491,8 +492,7 @@ static u32 get_entry_control(const struct xe_mocs_info *info,
}
static void __init_mocs_table(struct xe_gt *gt,
- const struct xe_mocs_info *info,
- u32 addr)
+ const struct xe_mocs_info *info)
{
struct xe_device *xe = gt_to_xe(gt);
@@ -505,10 +505,13 @@ static void __init_mocs_table(struct xe_gt *gt,
for (i = 0;
i < info->n_entries ? (mocs = get_entry_control(info, i)), 1 : 0;
i++) {
- struct xe_reg reg = XE_REG(addr + i * 4);
+ mocs_dbg(&gt_to_xe(gt)->drm, "%d 0x%x 0x%x\n", i,
+ XELP_GLOBAL_MOCS(i).addr, mocs);
- mocs_dbg(&gt_to_xe(gt)->drm, "%d 0x%x 0x%x\n", i, reg.addr, mocs);
- xe_mmio_write32(gt, reg, mocs);
+ if (GRAPHICS_VERx100(gt_to_xe(gt)) > 1250)
+ xe_gt_mcr_multicast_write(gt, XEHP_GLOBAL_MOCS(i), mocs);
+ else
+ xe_mmio_write32(gt, XELP_GLOBAL_MOCS(i), mocs);
}
}
@@ -542,9 +545,13 @@ static void init_l3cc_table(struct xe_gt *gt,
(l3cc = l3cc_combine(get_entry_l3cc(info, 2 * i),
get_entry_l3cc(info, 2 * i + 1))), 1 : 0;
i++) {
- mocs_dbg(&gt_to_xe(gt)->drm, "%d 0x%x 0x%x\n", i, LNCFCMOCS(i).addr,
+ mocs_dbg(&gt_to_xe(gt)->drm, "%d 0x%x 0x%x\n", i, XELP_LNCFCMOCS(i).addr,
l3cc);
- xe_mmio_write32(gt, LNCFCMOCS(i), l3cc);
+
+ if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1250)
+ xe_gt_mcr_multicast_write(gt, XEHP_LNCFCMOCS(i), l3cc);
+ else
+ xe_mmio_write32(gt, XELP_LNCFCMOCS(i), l3cc);
}
}
@@ -569,7 +576,7 @@ void xe_mocs_init(struct xe_gt *gt)
mocs_dbg(&gt_to_xe(gt)->drm, "flag:0x%x\n", flags);
if (flags & HAS_GLOBAL_MOCS)
- __init_mocs_table(gt, &table, GLOBAL_MOCS(0).addr);
+ __init_mocs_table(gt, &table);
/*
* Initialize the L3CC table as part of mocs initalization to make