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authorRodrigo Vivi <rodrigo.vivi@intel.com>2023-11-14 16:34:30 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-21 19:44:37 +0300
commit45c30d80008264d55915f4b87c6f9bbb3261071c (patch)
treebcae886da72ed9840fbc17bb77ee25153223077a /drivers/gpu/drm/xe/xe_query.c
parent5ca2c4b800194b55a863882273b8ca34b56afb35 (diff)
downloadlinux-45c30d80008264d55915f4b87c6f9bbb3261071c.tar.xz
drm/xe/uapi: Rename *_mem_regions masks
- 'native' doesn't make much sense on integrated devices. - 'slow' is not necessarily true and doesn't go well with opposition to 'native'. Instead, let's use 'near' vs 'far'. It makes sense with all the current Intel GPUs and it is future proof. Right now, there's absolutely no need to define among the 'far' memory, which ones are slower, either in terms of latency, nunmber of hops or bandwidth. In case of this might become a requirement in the future, a new query could be added to indicate the certain 'distance' between a given engine and a memory_region. But for now, this fulfill all of the current requirements in the most straightforward way for the userspace drivers. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Francois Dugast <francois.dugast@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_query.c')
-rw-r--r--drivers/gpu/drm/xe/xe_query.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 48befd9f0812..8b5136460ea6 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -377,12 +377,12 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
gt_list->gt_list[id].gt_id = gt->info.id;
gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
if (!IS_DGFX(xe))
- gt_list->gt_list[id].native_mem_regions = 0x1;
+ gt_list->gt_list[id].near_mem_regions = 0x1;
else
- gt_list->gt_list[id].native_mem_regions =
+ gt_list->gt_list[id].near_mem_regions =
BIT(gt_to_tile(gt)->id) << 1;
- gt_list->gt_list[id].slow_mem_regions = xe->info.mem_region_mask ^
- gt_list->gt_list[id].native_mem_regions;
+ gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
+ gt_list->gt_list[id].near_mem_regions;
}
if (copy_to_user(query_ptr, gt_list, size)) {