diff options
| author | José Roberto de Souza <jose.souza@intel.com> | 2023-10-03 23:19:06 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:42:09 +0300 |
| commit | a8e2e0d7fab79b83cdc3bb2dd192c94564fa4298 (patch) | |
| tree | 21da1b1521f2b211312ebb0834329f36337b8598 /drivers/gpu/drm | |
| parent | d32c49e318df0a3f334c2d2ff95ce4600df2d6bf (diff) | |
| download | linux-a8e2e0d7fab79b83cdc3bb2dd192c94564fa4298.tar.xz | |
drm/xe: Remove devcoredump readout of IPEIR
This register don't exist in gfx12+, so here dropping the readout
and print in devcoredump.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_hw_engine.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 |
3 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h index 792d431161c6..35dd4837dd75 100644 --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h @@ -31,12 +31,10 @@ #define RING_ACTHD_UDW(base) XE_REG((base) + 0x5c) #define RING_DMA_FADD_UDW(base) XE_REG((base) + 0x60) -#define RING_IPEIR(base) XE_REG((base) + 0x64) #define RING_IPEHR(base) XE_REG((base) + 0x68) #define RING_ACTHD(base) XE_REG((base) + 0x74) #define RING_DMA_FADD(base) XE_REG((base) + 0x78) #define RING_HWS_PGA(base) XE_REG((base) + 0x80) -#define IPEIR(base) XE_REG((base) + 0x88) #define RING_HWSTAM(base) XE_REG((base) + 0x98) #define RING_MI_MODE(base) XE_REG((base) + 0x9c) #define RING_NOPID(base) XE_REG((base) + 0x94) diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index c2db391cf267..f63c821baeb7 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -727,7 +727,6 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe) hw_engine_mmio_read32(hwe, RING_DMA_FADD_UDW(0)); snapshot->reg.ring_dma_fadd = hw_engine_mmio_read32(hwe, RING_DMA_FADD(0)); - snapshot->reg.ipeir = hw_engine_mmio_read32(hwe, IPEIR(0)); snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, RING_IPEHR(0)); if (snapshot->class == XE_ENGINE_CLASS_COMPUTE) @@ -784,7 +783,6 @@ void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot, drm_printf(p, "\tDMA_FADDR: 0x%08x_%08x\n", snapshot->reg.ring_dma_fadd_udw, snapshot->reg.ring_dma_fadd); - drm_printf(p, "\tIPEIR: 0x%08x\n", snapshot->reg.ipeir); drm_printf(p, "\tIPEHR: 0x%08x\n\n", snapshot->reg.ipehr); if (snapshot->class == XE_ENGINE_CLASS_COMPUTE) drm_printf(p, "\tRCU_MODE: 0x%08x\n", diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h index cd4bc1412a3f..5d4ee2904240 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine_types.h +++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h @@ -217,8 +217,6 @@ struct xe_hw_engine_snapshot { u32 ring_dma_fadd_udw; /** @ring_dma_fadd: RING_DMA_FADD */ u32 ring_dma_fadd; - /** @ipeir: IPEIR */ - u32 ipeir; /** @ipehr: IPEHR */ u32 ipehr; /** @rcu_mode: RCU_MODE */ |