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authorMahesh Kumar <mahesh1.kumar@intel.com>2018-05-25 18:52:38 +0300
committerJani Nikula <jani.nikula@intel.com>2018-06-07 11:39:05 +0300
commit2f08b23d70324bb0f592c71bd36cdc1d2f12face (patch)
tree758321c610822f033ca2b09e3dd7480900ad27ab /drivers/gpu
parent47541443a62a278f0a0f9a03c5403cb15bd62ded (diff)
downloadlinux-2f08b23d70324bb0f592c71bd36cdc1d2f12face.tar.xz
drm/i915/icl: fix icl_unmap/map_plls_to_ports
All connectors may not have best_encoder attached, so don't dereference encoder pointer for each connector. Fixes: c27e917e2bda ("drm/i915/icl: add basic support for the ICL clocks") Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180525155238.7054-1-lucas.demarchi@intel.com (cherry picked from commit c46ef57d2008e5195f086a538550488b49644db7) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b98ac0541f19..f4a8598a2d39 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2453,12 +2453,13 @@ void icl_map_plls_to_ports(struct drm_crtc *crtc,
for_each_new_connector_in_state(old_state, conn, conn_state, i) {
struct intel_encoder *encoder =
to_intel_encoder(conn_state->best_encoder);
- enum port port = encoder->port;
+ enum port port;
uint32_t val;
if (conn_state->crtc != crtc)
continue;
+ port = encoder->port;
mutex_lock(&dev_priv->dpll_lock);
val = I915_READ(DPCLKA_CFGCR0_ICL);
@@ -2490,11 +2491,12 @@ void icl_unmap_plls_to_ports(struct drm_crtc *crtc,
for_each_old_connector_in_state(old_state, conn, old_conn_state, i) {
struct intel_encoder *encoder =
to_intel_encoder(old_conn_state->best_encoder);
- enum port port = encoder->port;
+ enum port port;
if (old_conn_state->crtc != crtc)
continue;
+ port = encoder->port;
mutex_lock(&dev_priv->dpll_lock);
I915_WRITE(DPCLKA_CFGCR0_ICL,
I915_READ(DPCLKA_CFGCR0_ICL) |