Merge branch 'i2c/for-mergewindow' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c updates from Wolfram Sang:
 "Mostly driver updates and refactorization.

  The removal of the XLR driver and the i801 refactoring stand out a
  little. In the core, we enabled async suspend/resume for I2C
  controllers and their clients. No issues were reported during the test
  phase in -next. We will see how this goes for mainline"

* 'i2c/for-mergewindow' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (54 commits)
  i2c: sh_mobile: remove unneeded semicolon
  i2c: riic: Use platform_get_irq() to get the interrupt
  i2c: sh_mobile: Use platform_get_irq_optional() to get the interrupt
  i2c: bcm2835: Use platform_get_irq() to get the interrupt
  i2c: aspeed: Remove unused includes
  dt-bindings: i2c: aspeed: Drop stray '#interrupt-cells'
  i2c: sh_mobile: update to new DMAENGINE API when terminating
  i2c: rcar: update to new DMAENGINE API when terminating
  i2c: exynos5: Fix getting the optional clock
  i2c: designware-pci: Convert to use dev_err_probe()
  i2c: designware-pci: use __maybe_unused for PM functions
  i2c: designware-pci: Group MODULE_*() macros
  i2c: designware-pci: Add a note about struct dw_scl_sda_cfg usage
  i2c: designware-pci: Fix to change data types of hcnt and lcnt parameters
  i2c: designware: Do not complete i2c read without RX_FULL interrupt
  eeprom: at24: Add support for 24c1025 EEPROM
  dt-bindings: at24: add at24c1025
  i2c: tegra: use i2c_timings for bus clock freq
  dt-bindings: at24: Rework special case compatible handling
  i2c: i801: Don't clear status flags twice in interrupt mode
  ...

1 files changed, 15 insertions, 8 deletions

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index db26cc36e13f..6c698c10d3cd 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -119,23 +119,30 @@ static inline void writeccr(struct mpc_i2c *i2c, u32 x)
 /* Sometimes 9th clock pulse isn't generated, and slave doesn't release
  * the bus, because it wants to send ACK.
  * Following sequence of enabling/disabling and sending start/stop generates
- * the 9 pulses, so it's all OK.
+ * the 9 pulses, each with a START then ending with STOP, so it's all OK.
  */
 static void mpc_i2c_fixup(struct mpc_i2c *i2c)
 {
 	int k;
-	u32 delay_val = 1000000 / i2c->real_clk + 1;
-
-	if (delay_val < 2)
-		delay_val = 2;
+	unsigned long flags;
 
 	for (k = 9; k; k--) {
 		writeccr(i2c, 0);
-		writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
+		writeb(0, i2c->base + MPC_I2C_SR); /* clear any status bits */
+		writeccr(i2c, CCR_MEN | CCR_MSTA); /* START */
+		readb(i2c->base + MPC_I2C_DR); /* init xfer */
+		udelay(15); /* let it hit the bus */
+		local_irq_save(flags); /* should not be delayed further */
+		writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSTA); /* delay SDA */
 		readb(i2c->base + MPC_I2C_DR);
-		writeccr(i2c, CCR_MEN);
-		udelay(delay_val << 1);
+		if (k != 1)
+			udelay(5);
+		local_irq_restore(flags);
 	}
+	writeccr(i2c, CCR_MEN); /* Initiate STOP */
+	readb(i2c->base + MPC_I2C_DR);
+	udelay(15); /* Let STOP propagate */
+	writeccr(i2c, 0);
 }
 
 static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask)