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author | Lu Baolu <baolu.lu@linux.intel.com> | 2021-03-30 05:11:45 +0300 |
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committer | Joerg Roedel <jroedel@suse.de> | 2021-04-07 11:41:30 +0300 |
commit | 6c00612d0cba10f7d0917cf1f73c945003ed4cd7 (patch) | |
tree | 609a53c28c4a3dce6c9c90f6ddc61ab50fcc81be /drivers/iommu/intel/pasid.h | |
parent | 442b81836d6fdde1cf7dc5fc437a5f770c84498b (diff) | |
download | linux-6c00612d0cba10f7d0917cf1f73c945003ed4cd7.tar.xz |
iommu/vt-d: Report right snoop capability when using FL for IOVA
The Intel VT-d driver checks wrong register to report snoop capablility
when using first level page table for GPA to HPA translation. This might
lead the IOMMU driver to say that it supports snooping control, but in
reality, it does not. Fix this by always setting PASID-table-entry.PGSNP
whenever a pasid entry is setting up for GPA to HPA translation so that
the IOMMU driver could report snoop capability as long as it runs in the
scalable mode.
Fixes: b802d070a52a1 ("iommu/vt-d: Use iova over first level")
Suggested-by: Rajesh Sankaran <rajesh.sankaran@intel.com>
Suggested-by: Kevin Tian <kevin.tian@intel.com>
Suggested-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20210330021145.13824-1-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/intel/pasid.h')
-rw-r--r-- | drivers/iommu/intel/pasid.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/intel/pasid.h b/drivers/iommu/intel/pasid.h index 079534fcf55d..5ff61c3d401f 100644 --- a/drivers/iommu/intel/pasid.h +++ b/drivers/iommu/intel/pasid.h @@ -48,6 +48,7 @@ */ #define PASID_FLAG_SUPERVISOR_MODE BIT(0) #define PASID_FLAG_NESTED BIT(1) +#define PASID_FLAG_PAGE_SNOOP BIT(2) /* * The PASID_FLAG_FL5LP flag Indicates using 5-level paging for first- |