diff options
| author | Petr Machata <petrm@nvidia.com> | 2023-10-19 13:27:19 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2023-10-20 13:47:50 +0300 |
| commit | c678972580aedd28f273afdca94da6bb193ba3e7 (patch) | |
| tree | c75abab9f824d1fbe7f82fdf0dc63e5f42c5460f /drivers/net/ethernet/mellanox/mlxsw/spectrum.h | |
| parent | 8c893abd64ae662990fb41817011d84c101a4083 (diff) | |
| download | linux-c678972580aedd28f273afdca94da6bb193ba3e7.tar.xz | |
mlxsw: spectrum: Allocate LAG table when in SW LAG mode
In this patch, if the LAG mode is SW, allocate the LAG table and configure
SGCR to indicate where it was allocated.
We use the default "DDD" (for dynamic data duplication) layout of the LAG
table. In the DDD mode, the membership information for each LAG is copied
in 8 PGT entries. This is done for performance reasons. The LAG table then
needs to be allocated on an address aligned to 8. Deal with this by
moving the LAG init ahead so that the LAG table is allocated at address 0.
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/spectrum.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/spectrum.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum.h index ac9d03937f4b..c70333b460ea 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.h +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.h @@ -212,6 +212,7 @@ struct mlxsw_sp { struct mutex ipv6_addr_ht_lock; /* Protects ipv6_addr_ht */ struct mlxsw_sp_pgt *pgt; bool pgt_smpe_index_valid; + u16 lag_pgt_base; }; struct mlxsw_sp_ptp_ops { |