diff options
| author | Manikanta Pubbisetty <quic_mpubbise@quicinc.com> | 2022-04-29 20:05:00 +0300 |
|---|---|---|
| committer | Kalle Valo <quic_kvalo@quicinc.com> | 2022-05-02 16:59:07 +0300 |
| commit | 49890d9c93d5abf21babda2b495c7d3014fb9c98 (patch) | |
| tree | bc032a272a005351c537e2c42258924a0a22b022 /drivers/net/wireless/ath/ath11k/hw.h | |
| parent | 73d3e71306fe864d9667e8d37f731e93a91e2040 (diff) | |
| download | linux-49890d9c93d5abf21babda2b495c7d3014fb9c98.tar.xz | |
ath11k: HAL changes to support WCN6750
Add HAL changes required to support WCN6750. Offsets of some registers
for WCN6750 are different from other supported devices; move such
register offsets to platform specific ath11k_hw_regs.
Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20220429170502.20080-8-quic_mpubbise@quicinc.com
Diffstat (limited to 'drivers/net/wireless/ath/ath11k/hw.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath11k/hw.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h index b5a4758a6bc5..6d588cd80093 100644 --- a/drivers/net/wireless/ath/ath11k/hw.h +++ b/drivers/net/wireless/ath/ath11k/hw.h @@ -253,6 +253,7 @@ extern const struct ath11k_hw_ops ipq6018_ops; extern const struct ath11k_hw_ops qca6390_ops; extern const struct ath11k_hw_ops qcn9074_ops; extern const struct ath11k_hw_ops wcn6855_ops; +extern const struct ath11k_hw_ops wcn6750_ops; extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_ipq8074; extern const struct ath11k_hw_ring_mask ath11k_hw_ring_mask_qca6390; @@ -355,6 +356,12 @@ struct ath11k_hw_regs { u32 hal_reo_status_ring_base_lsb; u32 hal_reo_status_hp; + u32 hal_reo_cmd_ring_base_lsb; + u32 hal_reo_cmd_ring_hp; + + u32 hal_sw2reo_ring_base_lsb; + u32 hal_sw2reo_ring_hp; + u32 hal_seq_wcss_umac_ce0_src_reg; u32 hal_seq_wcss_umac_ce0_dst_reg; u32 hal_seq_wcss_umac_ce1_src_reg; @@ -370,12 +377,15 @@ struct ath11k_hw_regs { u32 pcie_qserdes_sysclk_en_sel; u32 pcie_pcs_osc_dtct_config_base; + + u32 hal_shadow_base_addr; }; extern const struct ath11k_hw_regs ipq8074_regs; extern const struct ath11k_hw_regs qca6390_regs; extern const struct ath11k_hw_regs qcn9074_regs; extern const struct ath11k_hw_regs wcn6855_regs; +extern const struct ath11k_hw_regs wcn6750_regs; static inline const char *ath11k_bd_ie_type_str(enum ath11k_bd_ie_type type) { |