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authorBitterblue Smith <rtl8821cerfe2@gmail.com>2023-03-13 16:58:14 +0300
committerKalle Valo <kvalo@kernel.org>2023-03-20 08:54:42 +0300
commit70664495e3d24803ec47ccaccee9a822220558a0 (patch)
tree315203dd70d21deebf63c909d13d66065fd84b9b /drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
parentd46e04ccd40457a0119b76e11ab64a2ad403e138 (diff)
downloadlinux-70664495e3d24803ec47ccaccee9a822220558a0.tar.xz
wifi: rtl8xxxu: Support new chip RTL8710BU aka RTL8188GU
This chip is found in cheap "free driver" USB adapters from Aliexpress. Initially they pretend to be a CD-ROM containing the driver for Windows. "Ejecting" switches the device to wifi mode. Features: 2.4 GHz, b/g/n mode, 1T1R, 150 Mbps. This chip is more unique than other Realtek chips: * The registers at addresses 0x0-0xff, which all the other chips use, can't be used here. New registers at 0x8000-0x80ff must be used instead. And it's not a simple matter of adding 0x8000: 0x2 (REG_SYS_FUNC) became 0x8004, 0x80 (REG_MCU_FW_DL) became 0x8090, etc. * Also there are a few new registers which must be accessed indirectly because their addresses don't fit in 16 bits. No other chips seem to have these. * The vendor driver compiles to 8188gu.ko, but the code calls the chip RTL8710B(U) pretty much everywhere, including messages visible to the user. Another difference compared to the other chips supported by rtl8xxxu is that it has a new PHY status struct, or three of them actually, from which we extract the RSSI, among other things. This is not unique, though, just new. The chips supported by rtw88 also use it. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Reviewed-by: Ping-Ke Shih <pkshih@realtek.com> Tested-by: Philipp Hortmann <philipp.g.hortmann@gmail.com> # Edimax N150 Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/4edbe29f-00b9-8eef-9789-20bed0b141e2@gmail.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h')
-rw-r--r--drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
index 5849fa4e1566..4dffbab494c3 100644
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
@@ -490,6 +490,8 @@
#define RXDMA_PRO_DMA_BURST_CNT GENMASK(3, 2) /* Set to 0x3. */
#define RXDMA_PRO_DMA_BURST_SIZE GENMASK(5, 4) /* Set to 0x1. */
+#define REG_EARLY_MODE_CONTROL_8710B 0x02bc
+
#define REG_RF_BB_CMD_ADDR 0x02c0
#define REG_RF_BB_CMD_DATA 0x02c4
@@ -845,6 +847,7 @@
#define REG_BT_CONTROL_8723BU 0x0764
#define BT_CONTROL_BT_GRANT BIT(12)
+#define REG_PORT_CONTROL_8710B 0x076d
#define REG_WLAN_ACT_CONTROL_8723B 0x076e
#define REG_FPGA0_RF_MODE 0x0800
@@ -1004,8 +1007,12 @@
#define CCK_PD_TYPE1_LV3_TH 0xdd
#define CCK_PD_TYPE1_LV4_TH 0xed
+#define REG_CCK0_TX_FILTER1 0x0a20
+#define REG_CCK0_TX_FILTER2 0x0a24
+#define REG_CCK0_DEBUG_PORT 0x0a28 /* debug port and Tx filter3 */
#define REG_AGC_RPT 0xa80
#define AGC_RPT_CCK BIT(7)
+#define REG_CCK0_TX_FILTER3 0x0aac
#define REG_CONFIG_ANT_A 0x0b68
#define REG_CONFIG_ANT_B 0x0b6c
@@ -1179,6 +1186,8 @@
Unavailable */
#define USB_HIMR_ROK BIT(0) /* Receive DMA OK Interrupt */
+#define REG_USB_ACCESS_TIMEOUT 0xfe4c
+
#define REG_USB_SPECIAL_OPTION 0xfe55
#define USB_SPEC_USB_AGG_ENABLE BIT(3) /* Enable USB aggregation */
#define USB_SPEC_INT_BULK_SELECT BIT(4) /* Use interrupt endpoint to
@@ -1204,6 +1213,41 @@
#define REG_NORMAL_SIE_MAC_ADDR 0xfe70 /* 0xfe70 - 0xfe75 */
#define REG_NORMAL_SIE_STRING 0xfe80 /* 0xfe80 - 0xfedf */
+/*
+ * 8710B register addresses between 0x00 and 0xff must have 0x8000
+ * added to them. We take care of that in the rtl8xxxu_read{8,16,32}
+ * and rtl8xxxu_write{8,16,32} functions.
+ */
+#define REG_SYS_FUNC_8710B 0x0004
+#define REG_AFE_CTRL_8710B 0x0050
+#define REG_WL_RF_PSS_8710B 0x005c
+#define REG_EFUSE_INDIRECT_CTRL_8710B 0x006c
+#define NORMAL_REG_READ_OFFSET 0x83000000
+#define NORMAL_REG_WRITE_OFFSET 0x84000000
+#define EFUSE_READ_OFFSET 0x85000000
+#define EFUSE_WRITE_OFFSET 0x86000000
+#define REG_HIMR0_8710B 0x0080
+#define REG_HISR0_8710B 0x0084
+/*
+ * 8710B uses this instead of REG_MCU_FW_DL, but at least bits
+ * 0-7 have the same meaning.
+ */
+#define REG_8051FW_CTRL_V1_8710B 0x0090
+#define REG_USB_HOST_INDIRECT_DATA_8710B 0x009c
+#define REG_WL_STATUS_8710B 0x00f0
+#define REG_USB_HOST_INDIRECT_ADDR_8710B 0x00f8
+
+/*
+ * 8710B registers which must be accessed through rtl8710b_read_syson_reg
+ * and rtl8710b_write_syson_reg.
+ */
+#define SYSON_REG_BASE_ADDR_8710B 0x40000000
+#define REG_SYS_XTAL_CTRL0_8710B 0x060
+#define REG_SYS_EEPROM_CTRL0_8710B 0x0e0
+#define REG_SYS_SYSTEM_CFG0_8710B 0x1f0
+#define REG_SYS_SYSTEM_CFG1_8710B 0x1f4
+#define REG_SYS_SYSTEM_CFG2_8710B 0x1f8
+
/* RF6052 registers */
#define RF6052_REG_AC 0x00
#define RF6052_REG_IQADJ_G1 0x01