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authorRob Herring <robh@kernel.org>2020-08-21 06:54:10 +0300
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2020-09-08 18:37:02 +0300
commitfb7652327101cdcaceae472c3b87fc5c8de28abe (patch)
tree97bff200718ccb427e93a97bedd36ea2b011c22f /drivers/pci/controller/dwc/pci-dra7xx.c
parent7b87ddc04b364b94142d3b1295d92f1fe1145781 (diff)
downloadlinux-fb7652327101cdcaceae472c3b87fc5c8de28abe.tar.xz
PCI: dwc: Remove hardcoded PCI_CAP_ID_EXP offset
While the Designware controller appears to hard code the PCI_CAP_ID_EXP capability register at 0x70, there's no need to hard code this in the driver as it is discoverable. Link: https://lore.kernel.org/r/20200821035420.380495-31-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Pratyush Anand <pratyush.anand@gmail.com> Cc: linux-omap@vger.kernel.org
Diffstat (limited to 'drivers/pci/controller/dwc/pci-dra7xx.c')
-rw-r--r--drivers/pci/controller/dwc/pci-dra7xx.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
index dc387724cf08..d42e0664f378 100644
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -73,8 +73,6 @@
#define LINK_UP BIT(16)
#define DRA7XX_CPU_TO_BUS_ADDR 0x0FFFFFFF
-#define EXP_CAP_ID_OFFSET 0x70
-
#define PCIECTRL_TI_CONF_INTX_ASSERT 0x0124
#define PCIECTRL_TI_CONF_INTX_DEASSERT 0x0128
@@ -142,7 +140,7 @@ static int dra7xx_pcie_establish_link(struct dw_pcie *pci)
struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);
struct device *dev = pci->dev;
u32 reg;
- u32 exp_cap_off = EXP_CAP_ID_OFFSET;
+ u32 exp_cap_off = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
if (dw_pcie_link_up(pci)) {
dev_err(dev, "link is already up\n");