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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2023-10-18 11:56:22 +0300
committerKrzysztof Wilczyński <kwilczynski@kernel.org>2023-10-20 15:12:56 +0300
commit1896d17f916819b8b5d145b4feef77109e78c435 (patch)
tree8653ef506eef23d9f79aa1fcdd87707ac4c79853 /drivers/pci/controller/dwc/pcie-designware.h
parent7873b49b41b92edb3395bff9a528eaf89da5e41c (diff)
downloadlinux-1896d17f916819b8b5d145b4feef77109e78c435.tar.xz
PCI: dwc: Add EDMA_UNROLL capability flag
Renesas R-Car Gen4 PCIe controllers have an unexpected register value in the eDMA CTRL register. So, add a new capability flag "EDMA_UNROLL" which would force the unrolled eDMA mapping for the problematic device. Suggested-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-7-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.h')
-rw-r--r--drivers/pci/controller/dwc/pcie-designware.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 6189884b4efa..e10f7e18b13a 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -51,8 +51,9 @@
/* DWC PCIe controller capabilities */
#define DW_PCIE_CAP_REQ_RES 0
-#define DW_PCIE_CAP_IATU_UNROLL 1
-#define DW_PCIE_CAP_CDM_CHECK 2
+#define DW_PCIE_CAP_EDMA_UNROLL 1
+#define DW_PCIE_CAP_IATU_UNROLL 2
+#define DW_PCIE_CAP_CDM_CHECK 3
#define dw_pcie_cap_is(_pci, _cap) \
test_bit(DW_PCIE_CAP_ ## _cap, &(_pci)->caps)