Merge branch 'pci/ctrl/dwc'

- Stop link on host_init errors and de-initialization (Serge Semin)

- Add support for unrolled iATU register space in dw_pcie_disable_atu()
  (Serge Semin)

- Disable outbound windows only for controllers that use iATU (Serge Semin)

- Set INCREASE_REGION_SIZE flag based on limit address, not on the size,
  since even a small size may cross a 4GB boundary (Serge Semin)

- Deallocate EPC memory on dw_pcie_ep_init() errors to avoid a leak (Serge
  Semin)

- Always enable CDM check if "snps,enable-cdm-check" exists instead of
  exiting early if the optional "num-lanes" was absent (Serge Semin)

- Simplify detection of whether we're using unrolled iATU registers (Serge
  Semin)

- Make dw_pcie_link_up() more generic by using dw_pcie_readl_dbi() instead
  of readl() (Serge Semin)

- Add dw_pcie_start_link() and dw_pcie_stop_link() wrappers to factor out
  checks for ops being implemented (Serge Semin)

- Move io_cfg_atu_shared to struct pcie_port and rename to cfg0_io_shared,
  since it's not used by dwc common code or dwc endpoint code (Serge Semin)

- Rename struct pcie_port to dw_pcie_rp to indicate that it's
  DesignWare-specific (Serge Semin)

- Drop unused struct dw_plat_pcie regmap pointer (Serge Semin)

- Fix some coding style issues (Serge Semin)

- Log link speed and width if it comes up (Serge Semin)

- Save DWC IP core version in native format as read from
  PORT_LOGIC.PCIE_VERSION_OFF register (Serge Semin)

- Read DWC IP core version from PORT_LOGIC.PCIE_VERSION_OFF (Serge Semin)

- Add macros to compare Synopsys IP core versions (Serge Semin)

- Drop manual DWC IP core version setup from intel-gw and tegra194 (Serge
  Semin)

- Add dw_pcie_ops.host_deinit() callback (Serge Semin)

- Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IO (Serge Semin)

- Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OB
  (Serge Semin)

- Simplify in/outbound iATU setup methods and reduce duplicated code (Serge
  Semin)

- Detect iATU region size from hardware (Serge Semin)

- Validate iATU outbound mappings against hardware constraints (Serge
  Semin)

- Check for errors in iATU setup (Serge Semin)

- Allocate a 32-bit DMA-able page to be MSI target instead of using a
  driver data structure that may not be addressable with 32-bit address
  (Will McVicker)

- Use the bitmap API to allocate bitmaps instead of open-coding it
  (Christophe JAILLET)

- Correct dw_pcie_free_msi() checking for when to remove IRQ handler and
  data (Dmitry Baryshkov)

- Split MSI init to new dw_pcie_msi_host_init() function (Dmitry Baryshkov)

- Convert struct pcie_port.msi_irq to an array so we can support more than
  32 MSI interrupts (Dmitry Baryshkov)

- Handle MSIs routed to multiple GIC interrupts for Qualcomm platforms with
  groups of 32 MSI vectors (Dmitry Baryshkov)

- Add additional MSI interrupts to qcom DT (Dmitry Baryshkov)

* pci/ctrl/dwc:
  dt-bindings: PCI: qcom: Support additional MSI vectors
  PCI: dwc: Handle MSIs routed to multiple GIC interrupts
  PCI: dwc: Convert struct pcie_port.msi_irq to an array
  PCI: dwc: Split MSI IRQ parsing/allocation to a separate function
  PCI: dwc: Correct msi_irq condition in dw_pcie_free_msi()
  PCI: dwc: Use the bitmap API to allocate bitmaps
  PCI: dwc: Fix MSI msi_msg DMA mapping
  PCI: dwc: Check iATU in/outbound range setup status
  PCI: dwc: Validate iATU outbound mappings against hardware constraints
  PCI: dwc: Add iATU regions size detection procedure
  PCI: dwc: Simplify in/outbound iATU setup methods
  PCI: dwc: Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OB
  PCI: dwc: Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IO
  PCI: dwc: Add dw_pcie_ops.host_deinit() callback
  PCI: tegra194: Drop manual DW PCIe controller version setup
  PCI: intel-gw: Drop manual DW PCIe controller version setup
  PCI: dwc: Add macros to compare Synopsys IP core versions
  PCI: dwc: Read DWC IP core version from register
  PCI: dwc: Use native DWC IP core version representation
  PCI: dwc: Detect iATU settings after getting "addr_space" resource
  PCI: dwc: Log link speed and width if it comes up
  PCI: dwc-plat: Drop dw_plat_pcie_of_match[] forward declaration
  PCI: dwc-plat: Drop unused regmap pointer
  PCI: dwc-plat: Simplify dw_plat_pcie_probe() return values
  PCI: dwc: Rename struct pcie_port to dw_pcie_rp
  PCI: dwc: Move io_cfg_atu_shared to struct pcie_port
  PCI: dwc: Add start_link/stop_link inlines
  PCI: dwc: Reuse local pointer to the resource data
  PCI: dwc: Organize local variable usage
  PCI: dwc: Convert dw_pcie_link_up() to use dw_pcie_readl_dbi()
  PCI: dwc: Simplify unrolled iATU detection
  PCI: dwc: Add newlines to log messages
  PCI: dwc: Add braces to multi-line if-else statements
  PCI: dwc: Always enable CDM check if "snps,enable-cdm-check" exists
  PCI: dwc: Deallocate EPC memory on dw_pcie_ep_init() errors
  PCI: dwc: Set INCREASE_REGION_SIZE flag based on limit address
  PCI: dwc: Disable outbound windows only for controllers using iATU
  PCI: dwc: Add unroll iATU space support to dw_pcie_disable_atu()
  PCI: dwc: Stop link on host_init errors and de-initialization

1 files changed, 9 insertions, 19 deletions

diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
index 5ba144924ff8..c3481200e86a 100644
--- a/drivers/pci/controller/dwc/pcie-intel-gw.c
+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
@@ -58,10 +58,6 @@
 #define BUS_IATU_OFFSET			SZ_256M
 #define RESET_INTERVAL_MS		100
 
-struct intel_pcie_soc {
-	unsigned int	pcie_ver;
-};
-
 struct intel_pcie {
 	struct dw_pcie		pci;
 	void __iomem		*app_base;
@@ -306,7 +302,11 @@ static int intel_pcie_host_setup(struct intel_pcie *pcie)
 	intel_pcie_ltssm_disable(pcie);
 	intel_pcie_link_setup(pcie);
 	intel_pcie_init_n_fts(pci);
-	dw_pcie_setup_rc(&pci->pp);
+
+	ret = dw_pcie_setup_rc(&pci->pp);
+	if (ret)
+		goto app_init_err;
+
 	dw_pcie_upconfig_setup(pci);
 
 	intel_pcie_device_rst_deassert(pcie);
@@ -343,7 +343,7 @@ static void __intel_pcie_remove(struct intel_pcie *pcie)
 static int intel_pcie_remove(struct platform_device *pdev)
 {
 	struct intel_pcie *pcie = platform_get_drvdata(pdev);
-	struct pcie_port *pp = &pcie->pci.pp;
+	struct dw_pcie_rp *pp = &pcie->pci.pp;
 
 	dw_pcie_host_deinit(pp);
 	__intel_pcie_remove(pcie);
@@ -373,7 +373,7 @@ static int __maybe_unused intel_pcie_resume_noirq(struct device *dev)
 	return intel_pcie_host_setup(pcie);
 }
 
-static int intel_pcie_rc_init(struct pcie_port *pp)
+static int intel_pcie_rc_init(struct dw_pcie_rp *pp)
 {
 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
 	struct intel_pcie *pcie = dev_get_drvdata(pci->dev);
@@ -394,16 +394,11 @@ static const struct dw_pcie_host_ops intel_pcie_dw_ops = {
 	.host_init =		intel_pcie_rc_init,
 };
 
-static const struct intel_pcie_soc pcie_data = {
-	.pcie_ver =		0x520A,
-};
-
 static int intel_pcie_probe(struct platform_device *pdev)
 {
-	const struct intel_pcie_soc *data;
 	struct device *dev = &pdev->dev;
 	struct intel_pcie *pcie;
-	struct pcie_port *pp;
+	struct dw_pcie_rp *pp;
 	struct dw_pcie *pci;
 	int ret;
 
@@ -424,12 +419,7 @@ static int intel_pcie_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
-	data = device_get_match_data(dev);
-	if (!data)
-		return -ENODEV;
-
 	pci->ops = &intel_pcie_ops;
-	pci->version = data->pcie_ver;
 	pp->ops = &intel_pcie_dw_ops;
 
 	ret = dw_pcie_host_init(pp);
@@ -447,7 +437,7 @@ static const struct dev_pm_ops intel_pcie_pm_ops = {
 };
 
 static const struct of_device_id of_intel_pcie_match[] = {
-	{ .compatible = "intel,lgm-pcie", .data = &pcie_data },
+	{ .compatible = "intel,lgm-pcie" },
 	{}
 };