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author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2023-07-17 09:54:53 +0300 |
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committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2023-08-25 20:33:18 +0300 |
commit | 8cd2b8ce48e52bfda76a04be9aef8c1b176693d9 (patch) | |
tree | 8a3b9fadbf48b21175721e93898e8950da8a6c8f /drivers/pci/controller/dwc/pcie-qcom-ep.c | |
parent | 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5 (diff) | |
download | linux-8cd2b8ce48e52bfda76a04be9aef8c1b176693d9.tar.xz |
PCI: qcom-ep: Pass alignment restriction to the EPF core
Qcom PCIe EP controllers have 4K alignment restriction for the outbound
window address. Hence, pass this info to the EPF core so that the EPF
drivers can make use of this info.
Link: https://lore.kernel.org/linux-pci/20230717065459.14138-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-ep.c')
-rw-r--r-- | drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 0fe7f06f2102..736be5bee458 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -706,6 +706,7 @@ static const struct pci_epc_features qcom_pcie_epc_features = { .core_init_notifier = true, .msi_capable = true, .msix_capable = false, + .align = SZ_4K, }; static const struct pci_epc_features * |