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authorRajat Jain <rajatja@google.com>2020-07-08 01:46:02 +0300
committerBjorn Helgaas <bhelgaas@google.com>2020-07-10 21:49:35 +0300
commit52fbf5bdeeef415b28b8e6cdade1e48927927f60 (patch)
tree006acc3c262d5b64c7bffbb790ed40805e6bc1f4 /drivers/pci/pci.h
parentcbe420361f92a31694fb3773a6247fda9aba1db3 (diff)
downloadlinux-52fbf5bdeeef415b28b8e6cdade1e48927927f60.tar.xz
PCI: Cache ACS capability offset in device
Currently the ACS capability is being looked up at a number of places. Read and store it once at enumeration so that it can be used by all later. No functional change intended. Link: https://lore.kernel.org/r/20200707224604.3737893-2-rajatja@google.com Signed-off-by: Rajat Jain <rajatja@google.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/pci.h')
-rw-r--r--drivers/pci/pci.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 6d3f75867106..12fb79fbe29d 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -532,7 +532,7 @@ static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
return resource_alignment(res);
}
-void pci_enable_acs(struct pci_dev *dev);
+void pci_acs_init(struct pci_dev *dev);
#ifdef CONFIG_PCI_QUIRKS
int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
int pci_dev_specific_enable_acs(struct pci_dev *dev);