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authorBjorn Helgaas <bhelgaas@google.com>2017-11-14 21:11:38 +0300
committerBjorn Helgaas <bhelgaas@google.com>2017-11-14 21:11:38 +0300
commit91f3140fdef61074515470243370d92a45f0b516 (patch)
tree02fd0311b414c4884d8ed951c8ec87bd906020bc /drivers/pci
parent5164e38a1793ed47362da0c1dc5e2e38597252f8 (diff)
parent1eaa8702129e38b3288a6b50530192ff8bb4fe0a (diff)
downloadlinux-91f3140fdef61074515470243370d92a45f0b516.tar.xz
Merge branch 'pci/host-xilinx' into next
* pci/host-xilinx: PCI: xilinx: Rename xilinx_pcie_link_is_up() to xilinx_pcie_link_up()
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pcie-xilinx.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index 94e13cb8608f..7b5325990f5e 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -129,7 +129,7 @@ static inline void pcie_write(struct xilinx_pcie_port *port, u32 val, u32 reg)
writel(val, port->reg_base + reg);
}
-static inline bool xilinx_pcie_link_is_up(struct xilinx_pcie_port *port)
+static inline bool xilinx_pcie_link_up(struct xilinx_pcie_port *port)
{
return (pcie_read(port, XILINX_PCIE_REG_PSCR) &
XILINX_PCIE_REG_PSCR_LNKUP) ? 1 : 0;
@@ -165,7 +165,7 @@ static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn)
/* Check if link is up when trying to access downstream ports */
if (bus->number != port->root_busno)
- if (!xilinx_pcie_link_is_up(port))
+ if (!xilinx_pcie_link_up(port))
return false;
/* Only one device down on each root port */
@@ -541,7 +541,7 @@ static void xilinx_pcie_init_port(struct xilinx_pcie_port *port)
{
struct device *dev = port->dev;
- if (xilinx_pcie_link_is_up(port))
+ if (xilinx_pcie_link_up(port))
dev_info(dev, "PCIe Link is UP\n");
else
dev_info(dev, "PCIe Link is DOWN\n");