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authorLinus Torvalds <torvalds@linux-foundation.org>2023-05-05 21:57:29 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2023-05-05 21:57:29 +0300
commitb49178e68fc7e3333c3d9f96eb09937ca84d05fd (patch)
treeb3245b5369a0b0ef4f3b3a8dbb049c58df9e9490 /drivers/phy
parent084f51d473cd566eab310d5da56fe7b68d0b10be (diff)
parent9d9ff3d2a4a567b543b71c2967d2ccc5e0ac6816 (diff)
downloadlinux-b49178e68fc7e3333c3d9f96eb09937ca84d05fd.tar.xz
Merge tag 'phy-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy fixes from Vinod Koul: - Fix for mediatek driver warning for variable used uninitialized and for wrong pll math * tag 'phy-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: phy: mediatek: hdmi: mt8195: fix wrong pll calculus phy: mediatek: hdmi: mt8195: fix uninitialized variable usage in pll_calc
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
index abfc077fb0a8..caa953780bee 100644
--- a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
+++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
@@ -213,7 +213,7 @@ static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw,
u64 tmds_clk, pixel_clk, da_hdmitx21_ref_ck, ns_hdmipll_ck, pcw;
u8 txpredivs[4] = { 2, 4, 6, 12 };
u32 fbkdiv_low;
- int i, ret;
+ int i;
pixel_clk = rate;
tmds_clk = pixel_clk;
@@ -271,7 +271,7 @@ static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw,
* [32,24] 9bit integer, [23,0]:24bit fraction
*/
pcw = div_u64(((u64)ns_hdmipll_ck) << PCW_DECIMAL_WIDTH,
- da_hdmitx21_ref_ck / PLL_FBKDIV_HS3);
+ da_hdmitx21_ref_ck * PLL_FBKDIV_HS3);
if (pcw > GENMASK_ULL(32, 0))
return -EINVAL;
@@ -288,17 +288,13 @@ static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw,
posdiv2 = 1;
/* Digital clk divider, max /32 */
- digital_div = div_u64((u64)ns_hdmipll_ck, posdiv1 / posdiv2 / pixel_clk);
+ digital_div = div_u64(ns_hdmipll_ck, posdiv1 * posdiv2 * pixel_clk);
if (!(digital_div <= 32 && digital_div >= 1))
return -EINVAL;
- mtk_hdmi_pll_set_hw(hw, PLL_PREDIV, fbkdiv_high, fbkdiv_low,
+ return mtk_hdmi_pll_set_hw(hw, PLL_PREDIV, fbkdiv_high, fbkdiv_low,
PLL_FBKDIV_HS3, posdiv1, posdiv2, txprediv,
txposdiv, digital_div);
- if (ret)
- return -EINVAL;
-
- return 0;
}
static int mtk_hdmi_pll_drv_setting(struct clk_hw *hw)