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authorStephen Warren <swarren@nvidia.com>2012-03-06 04:22:15 +0400
committerLinus Walleij <linus.walleij@linaro.org>2012-03-13 01:43:09 +0400
commit652162d469a73450a66b6c8049b16c2b7828fa24 (patch)
tree4df09c6e5e370a4bd73569503d1a124599871db5 /drivers/pinctrl/pinconf.c
parenta6c3b33f02c799db69a3cd82545e45e9df3d69ca (diff)
downloadlinux-652162d469a73450a66b6c8049b16c2b7828fa24.tar.xz
pinctrl: allow concurrent gpio and mux function ownership of pins
Per recent updates to Documentation/gpio.txt, gpiolib drivers should inform pinctrl when a GPIO is requested. pinctrl then marks that pin as in-use for that GPIO function. When an SoC muxes pins in a group, it's quite possible for the group to contain e.g. 6 pins, but only 4 of them actually be needed by the HW module that's mux'd to them. In this case, the other 2 pins could be used as GPIOs. However, pinctrl marks all the pins within the group as in-use by the selected mux function. To allow the expected gpiolib interaction, separate the concepts of pin ownership into two parts: One for the mux function and one for GPIO usage. Finally, allow those two ownerships to exist in parallel. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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